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Document the newly supported IBM x3455 board and the now-supported Broadcom HT-1000 chipset

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Corresponding to flashrom svn r119 and coreboot v2 svn r2713.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann 2007-06-05 15:02:18 +00:00
parent 1c283f4241
commit e823ee0fc5
3 changed files with 7 additions and 6 deletions
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2
README
View File

@ -53,6 +53,7 @@ no LinuxBIOS table is found:
* IWILL DK8-HTX: use -m iwill:dk8_htx
* Agami Aruma: use -m AGAMI:ARUMA
* ASUS P5A: use -m asus:p5a
* IBM x3455: use -m ibm:x3455
ROM Layout Support
@ -153,6 +154,7 @@ AMD CS5530
AMD Geode SC1100
AMD AMD-8111
ATI SB400
Broadcom HT-1000
Intel ICH0-ICH8 (all variations)
Intel PIIX4/PIIX4E/PIIX4M
NVIDIA CK804

4
board_enable.c
View File

@ -250,10 +250,10 @@ static int board_ibm_x3455(const char *name)
{
uint8_t byte;
/* Set GPIO lines in HT1000 southbridge */
/* Set GPIO lines in the Broadcom HT-1000 southbridge. */
outb(0x45, 0xcd6);
byte = inb(0xcd7);
outb(byte|0x20, 0xcd7);
outb(byte | 0x20, 0xcd7);
return 0;
}

7
chipset_enable.c
View File

@ -387,12 +387,11 @@ static int enable_flash_mcp55(struct pci_dev *dev, char *name)
}
static int enable_flash_ht1000(struct pci_dev *dev, char *name)
{
unsigned char byte;
uint8_t byte;
/* Set the 4MB enable bit */
/* Set the 4MB enable bit. */
byte = pci_read_byte(dev, 0x41);
byte |= 0x0e;
pci_write_byte(dev, 0x41, byte);
@ -462,7 +461,7 @@ static FLASH_ENABLE enables[] = {
{0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
{0x1166, 0x0205, "BCM HT1000", enable_flash_ht1000},
{0x1166, 0x0205, "Broadcom HT-1000", enable_flash_ht1000},
};
/*