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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00

Register Parallel/LPC/FWH programmers the same way SPI programmers are registered

All programmers are now calling programmer registration functions and
direct manipulations of buses_supported are not needed/possible anymore.

Note: Programmers without parallel/LPC/FWH chip support should not call
register_par_programmer().

Additional fixes:
Set max_rom_decode.parallel for drkaiser.
Remove abuse of programmer_map_flash_region in it85spi.
Annotate several FIXMEs in it85spi.

Corresponding to flashrom svn r1463.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
Carl-Daniel Hailfinger
2011-11-09 23:40:00 +00:00
parent f382e352ac
commit eaacd2d4e7
22 changed files with 293 additions and 252 deletions

View File

@ -35,6 +35,17 @@ const struct pcidev_status nics_natsemi[] = {
{},
};
static const struct par_programmer par_programmer_nicnatsemi = {
.chip_readb = nicnatsemi_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
.chip_readn = fallback_chip_readn,
.chip_writeb = nicnatsemi_chip_writeb,
.chip_writew = fallback_chip_writew,
.chip_writel = fallback_chip_writel,
.chip_writen = fallback_chip_writen,
};
static int nicnatsemi_shutdown(void *data)
{
pci_cleanup(pacc);
@ -48,7 +59,8 @@ int nicnatsemi_init(void)
io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi);
buses_supported = BUS_PARALLEL;
if (register_shutdown(nicnatsemi_shutdown, NULL))
return 1;
/* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15
* in another. My NIC has MA16 connected to A16 on the boot ROM socket
@ -57,9 +69,8 @@ int nicnatsemi_init(void)
* functions below wants to be 0x0000FFFF.
*/
max_rom_decode.parallel = 131072;
register_par_programmer(&par_programmer_nicnatsemi, BUS_PARALLEL);
if (register_shutdown(nicnatsemi_shutdown, NULL))
return 1;
return 0;
}