mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00
Various smaller flashrom improvements
- Document new 'satasii' programmer in -L output and manpage. - Drop PCI_IO_BASE_ADDRESS, pci.h has such #defines already. - Beautify flashrom output and make it more consistent. - Same for the 'make' output (reordered some $CC parameters). Build-tested on i386, shouldn't break any builds, I think. - Some variable renaming and other cosmetic fixes. Corresponding to flashrom svn r529. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann
parent
525339c32b
commit
eaefb48ee5
2
Makefile
2
Makefile
@ -46,7 +46,7 @@ $(PROGRAM): $(OBJS)
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$(CC) $(LDFLAGS) -o $(PROGRAM) $(OBJS) $(LIBS)
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flashrom.o: flashrom.c
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$(CC) -c $(CFLAGS) $(SVNDEF) $(CPPFLAGS) $< -o $@
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$(CC) $(CFLAGS) $(CPPFLAGS) -c -o $@ $< $(SVNDEF)
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clean:
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rm -f $(PROGRAM) *.o
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2
flash.h
2
flash.h
@ -560,7 +560,6 @@ void myusec_calibrate_delay(void);
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/* pcidev.c */
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#define PCI_OK 0
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#define PCI_NT 1 /* Not tested */
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#define PCI_IO_BASE_ADDRESS 0x10
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extern uint32_t io_base_addr;
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extern struct pci_access *pacc;
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@ -670,7 +669,6 @@ void satasii_chip_writeb(uint8_t val, chipaddr addr);
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uint8_t satasii_chip_readb(const chipaddr addr);
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extern struct pcidev_status satas_sii[];
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/* flashrom.c */
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extern int verbose;
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#define printf_debug(x...) { if (verbose) printf(x); }
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@ -147,6 +147,8 @@ is the PCI function number of the desired NIC.
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Example:
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.B "flashrom -p nic3com=05:04.0"
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.sp
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.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controller cards)"
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.sp
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.BR "* dummy" " (just prints all operations and accesses)"
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.TP
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.B "\-h, \-\-help"
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@ -543,6 +543,7 @@ int main(int argc, char *argv[])
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printf("\nSupported PCI devices flashrom can use "
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"as programmer:\n\n");
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print_supported_pcidevs(nics_3com);
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print_supported_pcidevs(satas_sii);
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exit(0);
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}
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12
pcidev.c
12
pcidev.c
@ -42,16 +42,16 @@ uint32_t pcidev_validate(struct pci_dev *dev, struct pcidev_status *devs)
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continue;
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/* Don't use dev->base_addr[0], won't work on older libpci. */
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addr = pci_read_long(dev, PCI_IO_BASE_ADDRESS) & ~0x03;
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addr = pci_read_long(dev, PCI_BASE_ADDRESS_0) & ~0x03;
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printf("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x)\n",
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printf("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n",
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devs[i].vendor_name, devs[i].device_name, dev->vendor_id,
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dev->device_id, dev->bus, dev->dev, dev->func);
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if (devs[i].status == PCI_NT) {
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printf("===\nThis PCI device is UNTESTED. Please email "
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"a report including the 'flashrom -p xxxxxx'\n"
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"output to flashrom@coreboot.org if it works "
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printf("===\nThis PCI device is UNTESTED. Please "
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"report the 'flashrom -p xxxx' output \n"
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"to flashrom@coreboot.org if it works "
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"for you. Thank you for your help!\n===\n");
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}
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@ -98,7 +98,7 @@ uint32_t pcidev_init(uint16_t vendor_id, struct pcidev_status *devs)
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exit(1);
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} else if (found > 1) {
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fprintf(stderr, "Error: Multiple supported PCI devices found. "
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"Please use 'flashrom -p xxxxxx=bb:dd.f' \n"
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"Use 'flashrom -p xxxx=bb:dd.f' \n"
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"to explicitly select the card with the given BDF "
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"(PCI bus, device, function).\n");
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exit(1);
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@ -81,18 +81,18 @@ void physunmap(void *virt_addr, size_t len)
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void *physmap(const char *descr, unsigned long phys_addr, size_t len)
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{
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if (len == 0) {
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printf_debug("Not mapping %s, zero size at 0x%08lx\n",
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descr, phys_addr);
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printf_debug("Not mapping %s, zero size at 0x%08lx.\n",
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descr, phys_addr);
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return NULL;
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}
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if ((getpagesize() - 1) & len) {
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fprintf(stderr, "Mapping %s at 0x%08lx, unaligned size 0x%lx\n",
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fprintf(stderr, "Mapping %s at 0x%08lx, unaligned size 0x%lx.\n",
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descr, phys_addr, (unsigned long)len);
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}
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if ((getpagesize() - 1) & phys_addr) {
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fprintf(stderr, "Mapping %s, 0x%lx bytes at unaligned 0x%08lx\n",
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fprintf(stderr, "Mapping %s, 0x%lx bytes at unaligned 0x%08lx.\n",
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descr, (unsigned long)len, phys_addr);
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}
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33
sata_sii.c
33
sata_sii.c
@ -15,7 +15,7 @@
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, , 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */
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@ -39,6 +39,7 @@ struct pcidev_status satas_sii[] = {
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{0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X Serial ATA Controller"},
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{0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 Serial ATA Raid II Controller"},
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{0x1095, 0x3512, PCI_NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] Serial ATA Controller"},
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{},
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};
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@ -50,33 +51,27 @@ int satasii_init(void)
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get_io_perms();
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pcidev_init(PCI_VENDOR_ID_SII, satas_sii);
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id = pcidev_dev->device_id;
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if ((id == 0x3132) || (id == 0x3124)) {
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/* BAR 0, offset 0x70 */
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addr = pci_read_long(pcidev_dev, PCI_IO_BASE_ADDRESS) & ~0x07;
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addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_0) & ~0x07;
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reg_offset = 0x70;
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} else {
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/* BAR 5, offset 0x50 */
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addr = pci_read_long(pcidev_dev, PCI_IO_BASE_ADDRESS + (5 * 4)) & ~0x07;
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addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_5) & ~0x07;
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reg_offset = 0x50;
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}
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sii_bar = physmap("SATA SIL registers", addr, 0x100);
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sii_bar += reg_offset;
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sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset;
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/* check if rom cycle are OK */
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if (!(mmio_readl(sii_bar)) & (1 << 26)) {
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/* Check if ROM cycle are OK. */
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if (!(mmio_readl(sii_bar)) & (1 << 26))
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printf("Warning: Flash seems unconnected\n");
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}
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return 0;
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}
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int satasii_shutdown(void)
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{
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free(pcidev_bdf);
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pci_cleanup(pacc);
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#if defined(__FreeBSD__) || defined(__DragonFly__)
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@ -96,21 +91,19 @@ void satasii_unmap(void *virt_addr, size_t len)
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void satasii_chip_writeb(uint8_t val, chipaddr addr)
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{
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uint32_t ctrl_reg, addr_reg;
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uint32_t ctrl_reg, data_reg;
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while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
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/* Mask out unused/reserved bits, set writes and start transaction */
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/* Mask out unused/reserved bits, set writes and start transaction. */
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ctrl_reg &= 0xfcf80000;
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ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0x7ffff);
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addr_reg = (mmio_readl((sii_bar + 4)) & ~0xff) | val;
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mmio_writel(addr_reg, (sii_bar + 4));
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data_reg = (mmio_readl((sii_bar + 4)) & ~0xff) | val;
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mmio_writel(data_reg, (sii_bar + 4));
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mmio_writel(ctrl_reg, sii_bar);
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while (mmio_readl(sii_bar) & (1 << 25)) ;
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}
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uint8_t satasii_chip_readb(const chipaddr addr)
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@ -119,13 +112,13 @@ uint8_t satasii_chip_readb(const chipaddr addr)
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while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
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/* Mask out unused/reserved bits, set reads and start transaction */
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/* Mask out unused/reserved bits, set reads and start transaction. */
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ctrl_reg &= 0xfcf80000;
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ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0x7ffff);
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mmio_writel(ctrl_reg, sii_bar);
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while ((mmio_readl(sii_bar)) & (1 << 25)) ;
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while (mmio_readl(sii_bar) & (1 << 25)) ;
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return (mmio_readl(sii_bar + 4)) & 0xff;
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}
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