openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00
Code Issues Releases Wiki Activity

flashchips: Set default wp test status for chips with custom config

Browse Source 
Without this, default value is the first in enum, which is OK. While
in reality, for the chips in the patch block-protection is not
available, so should be NA.

wp test status support was introduced later than the others, so old
chips don't have this field initialised.

Change-Id: I6ed8e04cd215865dc6a7d9415634dedbe3014ab5
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83132
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Anastasia Klimchuk 2024-06-19 18:47:41 +10:00
parent f8e618606a
commit eeb9b5dcf0
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
flashchips.c
View File

@ -2648,7 +2648,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = {.probe = NT, .read = NT, .erase = NT, .write = BAD},
.tested = {.probe = NT, .read = NT, .erase = NT, .write = BAD, .wp = NA},
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -3717,7 +3717,7 @@ const struct flashchip flashchips[] = {
.total_size = 64,
.page_size = 0, /* unused */
.feature_bits = 0,
.tested = {.probe = OK, .read = OK, .erase = BAD, .write = BAD},
.tested = {.probe = OK, .read = OK, .erase = BAD, .write = BAD, .wp = NA},
.probe = PROBE_JEDEC, /* FIXME! */
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -9072,7 +9072,7 @@ const struct flashchip flashchips[] = {
.model_id = MACRONIX_MX23L12854,
.total_size = 16384,
.page_size = 256,
.tested = {.probe = NT, .read = NT, .erase = NA, .write = NA},
.tested = {.probe = NT, .read = NT, .erase = NA, .write = NA, .wp = NA},
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.write = 0, /* MX23L12854 is a mask ROM, so it is read-only */
@ -9088,7 +9088,7 @@ const struct flashchip flashchips[] = {
.model_id = MACRONIX_MX23L1654,
.total_size = 2048,
.page_size = 256,
.tested = {.probe = NT, .read = NT, .erase = NA, .write = NA},
.tested = {.probe = NT, .read = NT, .erase = NA, .write = NA, .wp = NA},
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.write = 0, /* MX23L1654 is a mask ROM, so it is read-only */
@ -9104,7 +9104,7 @@ const struct flashchip flashchips[] = {
.model_id = MACRONIX_MX23L3254,
.total_size = 4096,
.page_size = 256,
.tested = {.probe = OK, .read = OK, .erase = NA, .write = NA},
.tested = {.probe = OK, .read = OK, .erase = NA, .write = NA, .wp = NA},
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.write = 0, /* MX23L3254 is a mask ROM, so it is read-only */
@ -9120,7 +9120,7 @@ const struct flashchip flashchips[] = {
.model_id = MACRONIX_MX23L6454,
.total_size = 8192,
.page_size = 256,
.tested = {.probe = OK, .read = OK, .erase = NA, .write = NA},
.tested = {.probe = OK, .read = OK, .erase = NA, .write = NA, .wp = NA},
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.write = 0, /* MX23L6454 is a mask ROM, so it is read-only */