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flashchips.c: Add 4BA write to XM25Qx256C

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Flash chips XM25QH256C and XM25QU256C support the 4-byte program
command (0x12) according to their datasheets, but the feature flag is
not enabled in flashchips.c, so enable it to allow this feature to be
used.

TICKET: https://ticket.coreboot.org/issues/371

BUG=b:259493706
TEST=build

Change-Id: I96c80762fcda2af6028c7a53d8c545b0c6565cbd
Signed-off-by: Liam Flaherty <liamflaherty@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/69713
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Liam Flaherty 2022-11-17 16:22:04 +11:00 committed by Anastasia Klimchuk
parent 67e5c6afa4
commit f27e19a331
1 changed files with 3 additions and 2 deletions
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5
flashchips.c
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@ -20336,7 +20336,7 @@ const struct flashchip flashchips[] = {
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN |
FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ |
FEATURE_WRSR2,
FEATURE_4BA_WRITE | FEATURE_WRSR2,
.tested = TEST_UNTESTED,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
@ -20385,7 +20385,8 @@ const struct flashchip flashchips[] = {
/* supports SFDP */
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN
| FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ,
| FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ
| FEATURE_4BA_WRITE,
.tested = TEST_UNTESTED,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,