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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

Add support for ST M25P80 chips

Detection was tested. Print status register before erase to help
debugging block locks.

Corresponding to flashrom svn r164 and coreboot v2 svn r3008.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
This commit is contained in:
Carl-Daniel Hailfinger 2007-12-16 21:15:27 +00:00
parent 4bcf175190
commit f5df46f6c6
3 changed files with 11 additions and 0 deletions

View File

@ -167,7 +167,12 @@ extern struct flashchip flashchips[];
#define SST_49LF016C 0x5C
#define SST_49LF160C 0x4C
/*
* ST25P chips are SPI, first byte of device ID is memory type, second
* byte of device ID is related to log(bitsize) at least for some chips.
*/
#define ST_ID 0x20 /* ST */
#define ST_M25P80 0x2014
#define ST_M50FLW040A 0x08
#define ST_M50FLW040B 0x28
#define ST_M50FLW080A 0x80

View File

@ -140,6 +140,8 @@ struct flashchip flashchips[] = {
probe_jedec, erase_chip_jedec, write_jedec},
{"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024,
probe_29f040b, erase_29f040b, write_29f040b},
{"M25P80", ST_ID, ST_M25P80, 1024, 64 * 1024,
probe_spi, generic_spi_chip_erase, generic_spi_chip_write},
{"82802ab", 137, 173, 512, 64 * 1024,
probe_82802ab, erase_82802ab, write_82802ab},
{"82802ac", 137, 172, 1024, 64 * 1024,

4
spi.c
View File

@ -280,7 +280,11 @@ uint8_t generic_spi_read_status_register()
int generic_spi_chip_erase(struct flashchip *flash)
{
const unsigned char cmd[] = JEDEC_CE_2;
uint8_t statusreg;
statusreg = generic_spi_read_status_register();
printf("chip status register before erase is %02x\n", statusreg);
generic_spi_write_enable();
/* Send CE (Chip Erase) */
generic_spi_command(JEDEC_CE_2_OUTSIZE, JEDEC_CE_2_INSIZE, cmd, NULL);