Meson looks up if the file xyz.c exists when calling file('xyz.c').
Furthermore it keeps track of the directory of the file. This is handy
when using multiple directories.
Change-Id: I346b5468b4203f1521ec73a90f93ff3b13ebf43c
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
The install functions of meson can take a relative path and join the
prefix automatically.
Change-Id: I9cb9faf4bdbcfd66098478cc3a260eb3b664a2e6
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
During development it can be useful to disable unit testing. By default
tests are built if cmocka is found. To force enable tests run `meson
build -Dtests=enable`. To disable tests run `meson build
-Dtests=disabled`.
Change-Id: I384c904c577b265dfe36bf46bf07c641bc29de9b
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63832
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Move build instructions for files inside the `platform/` directory to
`platform/meson.build`. This contains instructions to build
`memaccess.c`, the right endian implementation and selecting the right
legacy command line option for the endian.
The `platform/` directory should contain code that abstracts the
underlying platform but is not involved in flashrom logic.
Change-Id: I88044a3f903f316138483dd872a6d95f8686ae69
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63826
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Makefile treats warnings as errors, so enable the same option
for meson.
Makefile has an option to disable "warnings as errors" option
from command line. The same can be achieved with meson, see
scenario 2 below.
TEST=I verified the following scenarious
1) check that warnings treated as errors by enforcing higher
warning level
`meson setup --warnlevel=3 --wipe`
`ninja test`
shows tons of errors because warning level 3 is pedantic,
build fails
2) disable "warning as errors" option from command line
`meson configure -Dwerror=false`
`ninja test`
Now all warnings are non-blocking for build, so tests pass
3) back home
`meson configure -Dwerror=true`
`meson setup --warnlevel=2 --wipe`
`ninja test`
No warnings and tests pass
4) defaults: create new directory and run meson will all default
options
No warnings, all tests pass.
Change-Id: I06c72abf1c861f9b35736e02ef7f4a4fb6909b97
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Makefile has optimisation level set explicitly. This patch
sets the same level s into meson build.
Also disable debug by default to correspond to make builds.
These two options (optimisation and debug) are linked together
in meson build, so they need to be set together to be properly
recognised for builds.
Alternative approach would be to use buildtype option (and do not
set optimisation and debug). However, none of the standard
buildtypes gives a combination that we need:
optimisation level s and debug disabled.
TEST=ninja test shows no warnings and tests pass
Change-Id: I4ca96a866529cac320e66516ef280d5100ceefab
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Makefile options were more restrictive and produced more
warnings. This patch adds missing warning options into
meson build.
Makefile also has -Wall and -Wextra specified explicitly,
however this is covered by warning_level=2 which is already
set in meson.build. warning_level info:
https://github.com/mesonbuild/meson/issues/3275
There are few warning options that are present in meson,
but not in Makefile. These are left as is.
TEST=ninja test shows no warnings and tests pass
Change-Id: Id401bfd642dc3c13d85bd9a2dba56ada38714c25
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Move all header files to the new `include` directory.
Adapt include directives and build systems to the new directory.
Change-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
The NEED_PCI macro is only used to guard prototypes. This is not needed.
Change-Id: I6895b795bc96b3e251700bff4b0054407aac789a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Add functions like
`uint32_t read_le32(const void *base, size_t offset);`
Read a 32 bit unsigned from a base with an offset.
Having prototypes and a macro generated implementation makes it easier
to read, understand and spot errors in one of them.
Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/31016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Starting to move the platform dependent code to platform/ and provide
the abstraction through the platform.h header.
Change-Id: I35640282d451960f2a329ae24339ec05dbae6d30
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62899
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Split the code for endian conversion into separate files for big and
little endian. The buildsystem selects the correct file for the used
endianness. Replace the swab macros with `static inline` c functions.
Define macros for returning the same or swapped value. Call those macros
in the endian specific files.
Change-Id: I86d38d816b37c283279c485fac8027f8fb94364a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Allow chips to specify functions that map status register bits to
protection ranges. These are used to enumerate available ranges and
determine the protection state of chips. The patch also adds a range
decoding function for the example chips. Many other chips can also be
handled by it, though some will require different functions (e.g.
MX25L6406 and related chips).
Another approach that has been tried in cros flashrom is maintaining
tables of range data, but it quickly becomes error prone and hard to
validate.
Using a function to interpret the ranges allows compact encoding with
most chips and is flexible enough to allow chips with less predictable
ranges to be handled as well.
BUG=b:195381327,b:153800563
BRANCH=none
TEST=dumped range tables, checked against datasheets
Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
`getrevision.sh` isn't included in exported source code (including
GitHub's auto-generated tarballs and ZIPs). Per issue #95, the build
shouldn't depend on getrevision.sh for this reason. Previously,
however, Flashrom would not build from exported source using Meson
due to it requiring `getrevision.sh`. This patch has Meson use the
intended `getversion.sh` instead.
Signed-off-by: Samuel R. Messner <powpowd@gmail.com>
Change-Id: Id8601155b35f0299200c27d0278606127410ff16
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62061
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add a spi_master interface supporting MediaTek MST9U ISP mode.
Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate
read/write commands, in case the MST9U is attached to smbus.
TEST=Successfully programmed SPI on test hardware.
Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820
Signed-off-by: Neill Corlett <corlett@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
The Makefile recently gained finer-grained programmer dependency lists
allowing it to track which enabled programmers assume various things
about the system, like availability of libraries or the CPU
architecture. This change implements the same changes in the Meson
configuration file.
This fixes a number of programmers to correctly build on non-x86
systems, because they were previously misclassified as dependent on x86
architectural features but actually only used PCI.
BUG=none
TEST=meson build succeeds on both x86 and ARM
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: Iae93111fd48865f3fe8dd0eb637349b9a0c4affc
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Let programmer only depend on the kind of hardware access method they
really need. Libpci no longer depends on all hardware access types since
each programmer handles this individually.
Change-Id: I5bdafaa3c5023ad6c4a695493eeddf11bc148085
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The mmio_le/be_read/writex functions are used for raw memory access.
Bundle them with the physmap functions.
Change-Id: I313062b078e89630c703038866ac93c651f0f49a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Line up physmap with the other hwaccess related code.
Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Allow x86 msr related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.
Change-Id: Idc9ce9df3ea1e291ad469de59467646b294119c4
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Allow port I/O related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.
Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
CONFIG_I2C_SUPPORT has no mention in the source code. No need to pass
it to the compiler.
Change-Id: I2e19335e1b8d39f44dda14edc0a496dda6bc8c9c
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Determine which macro has to be set for the target system.
Do this in the buildsystem instead of using preprocessor macros.
Change-Id: Ic41ea025e35feb93f07ce7a94c0d15e6e84f38b9
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58278
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
On Windows target systems set the IS_WINDOWS=1 macro by the buildsystem.
Change-Id: I334708f2dec08ec9ca6ad4161fbd7fe22ac023a6
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58277
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Let the buildsystem (make / meson) handle the endianness determination
and set the __FLASHROM_LITTLE_ENDIAN__ or __FLASHROM_BIG_ENDIAN__ macro
as cflag.
Change-Id: I37093528ae55e712cc30a0267a8ceac332750e7d
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Handle system specific code in an own file like i2c_helper_linux.c.
The build system decides when to build it.
Change-Id: I0744e769dcc6000483e7256105903a87e927ee77
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
CONFIG_DEFAULT_PROGRAMER_NAME replaces CONFIG_DEFAULT_PROGRAMMER.
It uses the name of the programmer for identification.
make CONFIG_DEFAULT_PROGRAMER_NAME=dummy and
meson -Ddefault_programmer_name=dummy will extend to
CONFIG_DEFAULT_PROGRAMER_NAME=&programmer_dummy in the code.
Change-Id: I976447787c6f6bfbdc0145d80d61e1ddcf97ac33
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This patch includes mocks for io operations in hwaccess_x86_io.h
because those are needed to test lifecycle of mec1308.c and
ene_lpc.c
BUG=b:181803212
TEST=builds and ninja test
Change-Id: I3af612defe1af3850dfc1626a208d873e3a3eddc
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51487
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
While building with meson, however without libcmocka
available, attempts are made to fetch a copy to build via
the wrap mechanism. However in hermetic build enviroments
this causes hard failure as the dependency declaration of
cmocka is not optional. Fix this to ensure flashrom can build
hermetically in images without libcmocka available.
BUG=none
BRANCH=none
TEST=`
$ mkdir build && cd build/
$ meson --wrap-mode=nodownload --wrap-mode=nofallback ../
$ ninja test # validate configs, builds and no tests are run.
--
$ sudo apt install libcmocka-dev
$ mkdir build && cd build/
$ meson --wrap-mode=nodownload --wrap-mode=nofallback ../
$ ninja test # validate configs, builds and tests are run.
`
Change-Id: Ib59f4dacc14be9b02334ca59b348c19e22963367
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54368
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This change removes the build dependency on libpci for config_rayer_spi
it also makes sure that dependency on raw_access is maintained.
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: If7206a69d031c9bba9475a9e6769f6ef35701379
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The Raiden debug external spi programmer need only depend
on libusb and is unrelated to libpci. Correct meson and gnu make
builds where meson had configuration in the incorrect section
and gnu make artifactually disabled the build on Windows/MinGW
which doesn't have libpci.
BUG=none
TEST=still continues to build.
Change-Id: I2d6a8c33a2228abf006a9b278bcb7133765c7074
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit enables the feature and makes changes to existing
files and tests. I am writing more new tests with this.
Commit includes tests/flashrom.c because after enabling memory
checks the test started to fail (it used to leak memory indeed).
If you are wondering how to verify it works (because at the moment
all tests [still] pass so it’s not obvious that anything has
changed), then for example:
1) Remove free’s in flashbuses_to_text_test_success test, and it
will fail with message similar to this (line numbers from your local
source)
[ ERROR ] --- Blocks allocated...
../flashrom.c:1239: note: block 0x55f42304b640 allocated here
../flashrom.c:1239: note: block 0x55f42304b5c0 allocated here
../flashrom.c:1239: note: block 0x55f42304b3d0 allocated here
../flashrom.c:1239: note: block 0x55f42304b700 allocated here
../flashrom.c:1239: note: block 0x55f42304b780 allocated here
../flashrom.c:1239: note: block 0x55f42304bb00 allocated here
../flashrom.c:1239: note: block 0x55f42304b810 allocated here
ERROR: flashbuses_to_text_test_success leaked 7 block(s)
2) Add char *temp = malloc just before return from strcat_realloc
[ ERROR ] --- Blocks allocated...
../helpers.c:88: note: block 0x55a51307b6c0 allocated here
../helpers.c:88: note: block 0x55a51307b9e0 allocated here
ERROR: strcat_realloc_test_success leaked 2 block(s)
BUG=b:181803212
TEST=builds and ninja test
nm builddir/tests/flashrom_unit_tests.p/.._flashrom.c.o
nm builddir/tests/flashrom_unit_tests.p/flashrom.c.o
nm builddir/flashrom.p/flashrom.c.o
Change-Id: I0c6b6b8dc17aaee28640e3fca3d1fc9f7feabf5f
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Allow the user to specify if they would like a static archive or a DSO
produced for libflashrom by way of the flag e.g. `-Ddefault_library=static`.
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I77e5c298163979a0222270b3ac5d03542e5618f7
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51616
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Align meson options to be equivalent to the Makefile as they are used in
Gentoo's ebuilds.
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I97d2fd687aa21533b86f9af446038bfe3da1f7d3
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This is matching the following comment on Makefile:
\# This is a dirty hack, but it saves us from checking all PCI drivers and all platforms manually.
\# libpci may need raw memory, MSR or PCI port I/O on some platforms.
\# Individual drivers might have the same needs as well.
This changes fixes:
ld.lld: error: undefined symbol: rget_io_perms
>>> referenced by internal.c:243 (../flashrom-9999/internal.c:243)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_init)
ld.lld: error: undefined symbol: mmio_writeb
>>> referenced by internal.c:122 (../flashrom-9999/internal.c:122)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writeb)
ld.lld: error: undefined symbol: mmio_writew
>>> referenced by internal.c:128 (../flashrom-9999/internal.c:128)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writew)
ld.lld: error: undefined symbol: mmio_writel
>>> referenced by internal.c:134 (../flashrom-9999/internal.c:134)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writel)
ld.lld: error: undefined symbol: mmio_readb
>>> referenced by internal.c:140 (../flashrom-9999/internal.c:140)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readb)
ld.lld: error: undefined symbol: mmio_readw
>>> referenced by internal.c:146 (../flashrom-9999/internal.c:146)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readw)
ld.lld: error: undefined symbol: mmio_readl
>>> referenced by internal.c:152 (../flashrom-9999/internal.c:152)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readl)
ld.lld: error: undefined symbol: mmio_readn
>>> referenced by internal.c:158 (../flashrom-9999/internal.c:158)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readn)
ld.lld: error: undefined symbol: physmap
>>> referenced by flashrom.c:1454 (../flashrom-9999/flashrom.c:1454)
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(probe_flash)
>>> referenced by flashrom.c:1454 (../flashrom-9999/flashrom.c:1454)
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(probe_flash)
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
>>> referenced 2 more times
ld.lld: error: undefined symbol: physunmap
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
Change-Id: Id3fa4ec7a735b81e989ba9fe2b53b18d0956627a
Signed-off-by: Daniel Campello <campello@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51577
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Richard Hughes <hughsient@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
The `install` argument in `configure_file` is a feature introduced in
meson '0.50.0', but meson.build requests '>=0.47.0'. Meson complains:
WARNING: Project targeting '>=0.47.0' but tried to use feature
introduced in '0.50.0': install arg in configure_file.
To correct this, adjust the `meson_version` value accordingly.
Change-Id: Iadcffb7f8c720ffa8aa5f0ad62638d7b37f39934
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49924
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
This adds support for Spansion 25Fxxxxx chips. These chips
require their own probing logic because the first 6 bytes
returned by RDID must be examined to identify the chip.
New erase functions are required as the chips support multiple
sector layouts, and the default layout must be changed to be
able to erase the entire flash.
Adapted from cros flashrom at
`9c4c9a56b6a0370b383df9c75d71b3bd469e672d`.
BUG=b:153800073
TEST=builds
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Change-Id: I2d23f9c36ce8b2959807fbeee7f60e02444e3763
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Unfortantly raiden_debug was upstreamed with a misnaming
of the CONFIG_ make param that introduces unnecessary divergence.
Rename to 'CONFIG_RAIDEN_DEBUG_SPI' as-is downstream.
Change-Id: I07c03647c329286bb223e4dae4665704e508db2c
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48105
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
The following just lays out the structure for write protect
manipulation of SPI flash chips in Flashrom. We later follow
up with adding support for each manufacturer group.
BUG=b:153800563
BRANCH=none
TEST=builds
Change-Id: Id93b5a1cb2da476fa8a7dde41d7b963024117474
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40325
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
