The chip targeted by the `lspcon_i2c_spi` programmer is a Parade PS175.
Rename the programmer to match the chips vendor / family instead of the
generic LSPCON protocol. Remove the `_i2c_spi` ending in preparation to
become an opaque master. The chip is visible on an Acer Chromebox CXI4.
https://www.paradetech.com/products/ps175/https://www.acer.com/ac/en/US/content/series/acerchromeboxcxi4
TEST: `make CONFIG_PARADE_LSPCON=yes` and
`meson build -Dconfig_parade_lspcon=true` produces flashrom
binaries with the parade_lspcon programmer included.
Change-Id: I9148be6d9162c1722ff739929ca5e181b628dd57
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Add a spi_master interface supporting MediaTek MST9U ISP mode.
Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate
read/write commands, in case the MST9U is attached to smbus.
TEST=Successfully programmed SPI on test hardware.
Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820
Signed-off-by: Neill Corlett <corlett@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Allows us to move the individual entries into their respective driver files.
Change-Id: Ifbb0ee4db5a85b1cd2afeafe4dca838579f79878
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
