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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 15:33:42 +02:00

1249 Commits

Author SHA1 Message Date
Stefan Reinauer
009c51b062 Drop multiple forwards to man page and add a single one more prominently
Drop usage information that is already mentioned in the man page.

Corresponding to flashrom svn r827.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2010-01-03 23:50:28 +00:00
Michael Karcher
9678539b79 Fix Intel FWH decode size
Fixes wrong detection of area decoded to the FWH interfaces.

Corresponding to flashrom svn r826.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2010-01-03 15:09:17 +00:00
Stefan Reinauer
edc6188605 Drop known broken email addresses
Corresponding to flashrom svn r825.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
2010-01-03 14:40:30 +00:00
Sean Nelson
5d13464285 This patch shouldn't affect anything else in patchwork
It just splits $(OBJS) in Makefile into separate lists for Programmer,
Chip, and CLI related files/objects. This should help later on figuring
out where files may go for a libflashrom library.

Corresponding to flashrom svn r824.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-24 16:54:21 +00:00
Carl-Daniel Hailfinger
8a59ff0486 Only check for requested features in the Makefile
Libpci is no longer required to build flashrom and will not be checked
for if no PCI code is needed for the selected programmers.
libftdi is no longer checked for if FT2232 support is not selected.

With this patch, it is possible to build on pretty much every OS out
there (including Windows) without altering the Makefile.
Some gcc versions may need a CFLAGS override for a warning in
dummyflasher.c, though.

Corresponding to flashrom svn r823.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
2009-12-24 03:33:11 +00:00
Carl-Daniel Hailfinger
36cc1c8144 Internal.c was always compiled in because it hosted the function internal_delay()
Move that function to udelay.c and compile internal.c only if really
needed. physmap.c is only needed if the programmer is internal or a PCI
card. Make its compilation conditional.

Corresponding to flashrom svn r822.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
2009-12-24 03:11:55 +00:00
Carl-Daniel Hailfinger
552420b0d6 Factor out CLI code by moving generic stuff out of main()
Add a generic programmer list output function to be used by alternative
frontends. The interface between main() and doit is a hack and should
get a clean design, but for now it serves the purpose of shortening
main() by 120 lines. The rest of main() needs to be refactored a bit
more before moving main() away.

Corresponding to flashrom svn r821.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-24 02:15:55 +00:00
Raúl Soriano
cd8404dd9d Add VIA VT8233A identification, mark as tested
Corresponding to flashrom svn r820.

Signed-off-by: Raúl Soriano <GatoLoko@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-23 21:29:18 +00:00
Sean Nelson
6b11ad2f19 Convert the following chips to use struct eraseblock
AMIC_A29002B
AMIC_A29002T
EN_29F002B
EN_29F002T
MBM29F004BC
MBM29F004TC
MBM29F400BC
MBM29F400TC
MX_25L3205
MX_25L6405
MX_29F002B
MX_29F002T

Add block erasers for m29f400bt and mx29f002.
Change programmer delays from 2 seconds to 10us in mx29f002 and am29f040b.

Corresponding to flashrom svn r819.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-23 17:05:59 +00:00
Carl-Daniel Hailfinger
bbfeb70fb9 Add blockwise erase to all supported chips of the SST25 family
SST25VF040.REMS, SST25VF040B, SST25VF040B.REMS, SST25VF080B,
SST25VF016B, SST25VF032B

Corresponding to flashrom svn r818.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-23 12:16:47 +00:00
Sean Nelson
8918729891 Convert the following chips to use struct eraseblock
AT25DF021, AT25DF041A, AT25DF081, AT25DF161, AT25DF321, AT25DF321A,
AT25DF641, AT25F512B, AT25FS010, AT25FS040, AT26DF041, AT26DF081A,
AT26DF161, AT26DF161A, AT26F004, AT29C512, AT29C010A, AT29C020,
AT29C040A, AT49BV512, AT49F002(N), AT49F002(N)T

A possible future patch would to add spi_block_erase_d7 to spi.c as an 
alternate to spi_block_erase_20. Only some SPI chips support d7.

Corresponding to flashrom svn r817.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-23 12:02:55 +00:00
Luc Verhaegen
6c5f7338b7 Board: Add MSI K8N Neo4-F
Corresponding to flashrom svn r816.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Fraser Hanson <fraser.hanson@gmail.com>
2009-12-23 03:01:36 +00:00
Luc Verhaegen
73d2119473 Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enable
Only done for VT8237R (possibly needed for VT8237 too), VT8235 does
not need this (even if the original bios does so: Asus A7V8X-MX SE,
MSI KT4V were verified).

This then opens a floodgate of cleanups in the board enables.
* EPIA SP board enable vanishes, taking EPIA CN match with it.
* Asus A7V8X-MX/Tyan S2498 board enable then equals
  w836xx_memw_enable_2e
* AOpen vKM400Am-S board enable then equals it8705_rom_write_enable
* Epia M board enable becomes via_vt823x_gpio15_raise
* Epia N board enable becomes via_vt823x_gpio9_raise
* Asus M2V-MX board enable becomes via_vt823x_gpio5_raise
* vt823x_gpio_set becomes via_vt823x_gpio_set, and now detects ISA
  bridge itself, in concordance with intel ich and nvidia mcp gpio.

Corresponding to flashrom svn r815.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-23 00:54:26 +00:00
Carl-Daniel Hailfinger
db53ec5373 Add a few FIXME comments to the generic SPI code
Corresponding to flashrom svn r814.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-22 23:54:10 +00:00
Carl-Daniel Hailfinger
14e100c933 SuperI/O detection now happens unconditionally and before the chipset enable
We could run it after chipset enable, but it definitely has to happen
before board enable because the board enable usually accesses the
SuperI/O. With this patch, it is possible to add a struct superio to the
board enable table for more accurate matching in case subsystem IDs are
ambiguous. This patch focuses on the generic infrastructure aspect and
on support for IT8712F/IT8716F.

Thanks go to Adrian Glaubitz and Ward Vandewege for testing.

Corresponding to flashrom svn r813.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
2009-12-22 23:42:04 +00:00
Sean Nelson
72a9a02b38 Convert the following chips to use struct eraseblock
Am29F010A/B
Am29F002(N)BB
Am29F002(N)BT
Am29F016D
Am29F040B
Am29F080B
Am29LV040B
Am29LV081B
A29040B
Pm29F002T
Pm29F002B

Change function signature of Am29 erase functions and JEDEC chip erase
to be usable with block_erasers.

Corresponding to flashrom svn r812.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-22 22:15:33 +00:00
Carl-Daniel Hailfinger
63ce4bb0d2 Clarify comment about how to enter chip erase functions in struct block_eraser
Reported by Sean Nelson.

Corresponding to flashrom svn r811.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-22 13:04:53 +00:00
Luc Verhaegen
23ebd751ee Boards: Fix several issues with nvidia_mcp_gpio_set
- CK804, MCP04, MCP2 use the isa bridges..
- Newer nvidia mcp's do use the smbus controllers (Found by
  Michael Karcher).
- gpio line check breaks EPoX EP-8RDA3+, and should be wider.

Corresponding to flashrom svn r810.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
2009-12-22 13:04:13 +00:00
Adam Jurkowski
e4984102e9 Chipset: Add support for Intel Poulsbo chipset
Corresponding to flashrom svn r809.

Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl>
Acked-by: Luc Verhaegen <libv@skynet.be>
2009-12-21 15:30:46 +00:00
Luc Verhaegen
b843e2019a Boards: Add ECS K7S6A
The nulled second set of subsystem ids is correct, and this seems
to be a unique match.

Corresponding to flashrom svn r808.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: spirals <spirals@eircom.net>
2009-12-18 08:37:55 +00:00
Carl-Daniel Hailfinger
aa000982f4 jedec: warn if toggle bit is stuck for too long and allow for delays between tries
If the JEDEC Toggle Bit algorithm needs more than 2^20 loops, it is a
good sign we should have used delays between toggle bit reads.

Tell the user about this. 2^20 loops need roughly a second depending on
flash bus speed. One reason for excessive loops can be a slow operation
like erase.

The Winbond W39V040C requires a 50 ms delay between toggle bit reads
during erase according to the datasheet. Turns out a 2 ms delay is
sufficient. Use a safety factor of 4 and default all erase operations
to 8 ms delay between toggle reads. This is short enough not to have
a substantial negative impact on erase times, and should improve
reliability.

This patch addresses the excessive toggle behaviour (observed on some
non-Winbond chips) and the toggle delay requirement (Winbond W39V040C).

Corresponding to flashrom svn r807.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Javier Ortega Conde (aka Malkavian) <malkavian666@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
2009-12-17 16:20:26 +00:00
Carl-Daniel Hailfinger
2a9e2455cd Use the maximum decode size infrastructure
- Detect max FWH size for Intel
  631xESB/632xESB/3100/ICH6/ICH7/ICH8/ICH9/ICH10.
- Move IDSEL override before decode size checking for the chipsets
  listed above or flashrom will complain based on old values.
- Adjust supported flash buses for the chipsets listed above (none of
  them supports LPC or Parallel).
- Detect max parallel size for AMD/National Semiconductor CS5530.
- Adjust supported flash buses for CS5530/CS5530A.
- Set board-specific max decode size for Elitegroup K7VTA3.
- Set board-specific max decode size for Shuttle AK38N.

Corresponding to flashrom svn r806.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-12-17 15:20:01 +00:00
Sean Nelson
c12fc71f74 Skip all delays in probe_jedec() if probe_delay is 0
Probe_jedec() checks the delay value and issues programmer_delay based
on the value except for delays between single chip_writeb. If a chip has
zero probe_delay, delays between chip_writeb should be skipped as well.

Corresponding to flashrom svn r805.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-17 04:22:40 +00:00
Carl-Daniel Hailfinger
d3abc651bc Remove nonexisting functions from chipdrivers.h
Corresponding to flashrom svn r804.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-17 04:21:12 +00:00
Luc Verhaegen
f522691658 Boards: Formalize intel piix4 gpo setting
The function intel_piix4_gpo_set includes proper gpo pin checking, and
gpo pin enables when necessary.

This is a leftover from soyo SY-6BA+III code that turned out to be
unnecessary, but still used for the epox ep-bx3 board enable which it
cleans up and clarifies.

Difference to old code:
* typical bios delay io port 0xEB now never gets touched.
* pci config byte 0xB0 was not altered before.

Corresponding to flashrom svn r803.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 10:41:58 +00:00
Jonathan A. Kollasch
b87f23b163 Use pci_fill_info() so device_class is valid
This is needed on NetBSD and probably other non-Linux platforms.

Corresponding to flashrom svn r802.

Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 04:24:42 +00:00
Zachary O Dillard
9bd5eecf45 Mark ASRock M3A790GXH/128M as supported, no board enable needed
Corresponding to flashrom svn r801.

Signed-off-by: Zachary O Dillard <teathief@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 04:11:12 +00:00
Carl-Daniel Hailfinger
9d48916de6 Fix eraseblock walking and add a few more checks to make sure such bugs get caught in the future
I found this bug during a code review. A consistency check for
eraseblock definitions has been merged as well.

Corresponding to flashrom svn r800.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-14 04:04:18 +00:00
Carl-Daniel Hailfinger
5d5c072422 Split hardware access, OS abstraction and chip drivers out of flash.h
This patch is only the first step, but it hopefully will make working
with the code and especially porting to new platforms easier.

Subsequent patches should move #includes for the newly created files
hwaccess.h and chipdrivers.h from flash.h to the files which need them.
Programmers should live in a separate header file as well.

Tested-by: Idwer Vollering <vidwer@gmail.com>

Corresponding to flashrom svn r799.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-14 03:32:24 +00:00
Adam Jurkowski
516f93219f Don't print out supported PCI devices header if all following lines are excluded from build
Corresponding to flashrom svn r798.

Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 03:07:31 +00:00
Carl-Daniel Hailfinger
66ef4e5ff3 Internal (onboard) programming was the only feature which could not be disabled
Make various pieces of code conditional on support for internal
programming. Code shared between PCI device programmers and onboard
programming is now conditional as well.

It is now possible to build only with dummy support:
make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no
CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no

This allows building for a specific use case only, and it also
facilitates porting to a new architecture because it is possible to
focus on highlevel code only.

Note: Either internal or dummy programmer needs to be compiled in due to
the current behaviour of always picking a default programmer if -p is
not specified. Picking an arbitrary external programmer as default  
wouldn't make sense.

Build and runtime tested in all 1024 possible build combinations. The
only failures are by design as mentioned above.

Corresponding to flashrom svn r797.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-13 22:28:00 +00:00
Luc Verhaegen
a7e30503fa Boards: Tighten up ID match list
Tighten up board id match table in preparation of upcoming matching
changes.

Some boards are deliberately broken so that we will receive reports
or can remove support later (for instance, for agami aruma, which,
probably is no longer available in the wild).

* Acorp 6A815EPD: make autodetectable.
* Agami Aruma: remove bogus subsystem ids. Due to lacking secondary
  main id, this match will break soon.
* GIGABYTE GA-2761GXDK: Add secondary main id. Subsystem ids are not
  possible as they are all copies of the main ids. Will still require
  -m.
* GIGABYTE GA-M57SLI-S4: add full set of subsystem ids. Will keep
  match name for coreboot name matching.
* GIGABYTE GA-M61P-S3: Add secondary main id. Remove name match.
  Probably has good subsystem ids, but no info was found. So
  deliberately broken match.
* GIGABYTE GA-MA790FX-DQ6: pointless name match.
* IBM x3455: add full ids, remove name match.
* Kontron 986LCD-M: remove full id match as it is bogus. Kontron is
  an embedded vendor and does not bother with subsystem ids, so
  make this board name match only.
* MSI MS-6590 (KT4 Ultra): remove name match.
* MSI MS-7135 (K8N Neo3): add full id set, keep name match for
  coreboot.
* VIA EPIA-N/NL: remove name match.
* VIA PC3500G: remove name match.

Corresponding to flashrom svn r796.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-09 11:39:02 +00:00
David Bartley
f58d364f1a Boards: Add Asus M2V-MX
Expands via vt823x gpio support to also accept gpio5.

Corresponding to flashrom svn r795.

Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca>
Acked-by: Luc Verhaegen <libv@skynet.be>
2009-12-09 07:53:01 +00:00
Luc Verhaegen
9892ca6b94 Chipset: remove sis630 chipset enable for sis540
SiS630 chipset enable is equal to sis540 plus superio "poking".

Superio poking equals IT8705F flash write enable, which is currently
dealt with on a board by board basis in board_enable.c. Not all
630 and newer based boards come with it8705/sis950 superios.

Corresponding to flashrom svn r794.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-09 07:43:13 +00:00
Maciej Pijanka
a661e15d52 Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI)
Corresponding to flashrom svn r793.

Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-12-08 17:26:24 +00:00
Luc Verhaegen
96f88fbcb6 Boards: Add general nVidia MCP gpio routine
Turns out that the AMD 8111 datasheet describes this bit of the MCP
perfectly.

Corresponding to flashrom svn r792.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-03 12:25:34 +00:00
Idwer Vollering
fcd070ef96 Mark the following boards as OK (no board-enable needed)
- AsRock K8S8X (reported by Adrian Glaubitz <adrian.glaubitz@gmail.com>)
   http://www.flashrom.org/pipermail/flashrom/2009-November/000937.html

 - ASUS K8V-X SE (reported by Adrian Glaubitz <adrian.glaubitz@gmail.com>)
   http://www.flashrom.org/pipermail/flashrom/2009-November/000965.html

 - DFI Blood-Iron P35 T2RL (reported by Erno Vaurio <ernovaur@gmail.com>)
   http://www.flashrom.org/pipermail/flashrom/2009-November/001059.html

Corresponding to flashrom svn r791.

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-12-01 12:55:18 +00:00
Luc Verhaegen
0f9221c8f1 Board enable for Shuttle AK31
All AK31 versions, 1.x, 2.x and 3.x are supported by this board enable.
Sadly this board can not be autodetected.

Re-uses the epox ep 8k5a2 board enable, which now lost its check for
the VT8235 ISA bridge and got renamed to w836xx_memw_enable_2e.

Corresponding to flashrom svn r790.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
2009-11-29 01:19:25 +00:00
Luc Verhaegen
4802a7b275 Boards: Fix up MSI KT4V board enable
* Add autodetection and remove match strings.
* Make use of vt823x_set_all_writes_to_lpc.

Corresponding to flashrom svn r789.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-28 21:12:58 +00:00
Luc Verhaegen
6c5d4cc608 Boards: Add Asus P4B266LM (Sony Vaio PCV-RX650)
Corresponding to flashrom svn r788.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Allan Bjorklund <abjork@speakeasy.net>
2009-11-28 18:26:21 +00:00
Luc Verhaegen
1265d8d3fb Boards: Add board match for Asrock P4i65GV
Corresponding to flashrom svn r787.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Idwer Vollering <vidwer@gmail.com>
2009-11-28 18:16:31 +00:00
Luc Verhaegen
60ea7dc95f Boards: provide enormous intel_ich_gpio_set function
This code sets gpio lines on random intel ichs. Detects all currently
known intel ICHs, checks gpio lines, and then sets them accordingly.

Corresponding to flashrom svn r786.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Idwer Vollering <vidwer@gmail.com>
2009-11-28 18:07:51 +00:00
Michael Karcher
1c296ca8bc Use common jedec functionality where appropriate
The deleted function in en29f002a.c is reintroduced as
write_by_byte_jedec in jedec.c as it contains no chip-specific
instructions. It is not yet used in other chip drivers, as key addresses
(0x2AAA/0x5555) are often specified with less bits. After crosschecking
datasheets, most of the fixmes can probably be resolved as indicated in
them, causing significant code reduction.

The common JEDEC code for bytewise programming does not program 0xFF
at all. The chips that had a dedicated bytewise flash function which
has been changed to write_jedec_1 thus changed flashing behaviour
and the "write" test flag has been removed. This applies to: AMD
Am29F002BB/Am29F002NBB AMD Am29F002BT/Am29F002NBT (TEST_OK_PREW before)
AMIC A29002B AMIC A29002T (TEST_OK_PREW before) EON EN29F002(A)(N)B EON
EN29F002(A)(N)T (TEST_OK_PREW before) Macronix MX29F001B (TEST_OK_PREW
before) Macronix MX29F001T (TEST_OK_PREW before) Macronix MX29F002B
Macronix MX29F002T (TEST_OK_PREW before) Macronix MX29LV040

Similar analysis should be performed for the read id stuff.

Corresponding to flashrom svn r785.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-27 17:49:42 +00:00
Carl-Daniel Hailfinger
797a8346cf Add support for Intel 3400 series / 5 series chipset
Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400
Series Chipset Specification Update).
According to http://pciids.sourceforge.net/ we probably should match all
IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the
same.
If anybody has contacts at Intel and can check, I'd be happy to add the
rest of the IDs.

Corresponding to flashrom svn r784.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-26 16:51:39 +00:00
Michael Karcher
972cec282c Refine support for the JEDEC Software Data Protection
This patch removes the extremely dangerous unprotect_jedec function
which is not used at all within flashrom code, and renames the
misleadingly named protect_jedec function to start_program_jedec.

Calls to protect_jedec after flashing are removed, because a) on LPC
chips, the command sent by protoct_jedec is not even in the datasheet
and b) on parallel chips, the block write command issued before already
contained the software protection sequence, so software protection is
definitely enabled.

This patch also removes two clones of protect_jedec

Background: JEDEC Software Data Protection started as an optional
feature, which was disabled on the first single-voltage-flash chips.
The software data protection is the need to prefix a write with a magic
"write enable" command, while without write protection every write
access into the chip's address space modifies flash content. This magic
write enable command also tells the flash chip that the programmer
obviously support sending write-enable commands and turns off the "any
write modifies flash content" mode. There also exist a two-command (6
writes) sequence that disables Software Data Protection completey, which
should only ever be used to prepare updating with a device that can't
handle software data protection.

Corresponding to flashrom svn r783.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-26 14:50:52 +00:00
Zheng Bao
1db2b75902 Add entries of W25x32 and W25x64
The model_ids are already in the header.

W25x32 has been successfully probed. W25x64 is not available, the entry
is based on the datasheet.

Corresponding to flashrom svn r782.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-26 11:05:01 +00:00
Carl-Daniel Hailfinger
d0250a3afd Clarify a comment about verification routine usage
Corresponding to flashrom svn r781.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-25 17:05:52 +00:00
Carl-Daniel Hailfinger
b7e01457d1 Reduce realloc syscall overhead for FT2232 and bitbang
FT2232 ran realloc() for every executed command. Start with a big enough
buffer and don't touch buffer size unless it needs to grow.
Bitbang was slightly better: It only ran realloc() if buffer size
changed. Still, the solution above improves performance and reliability.

Corresponding to flashrom svn r780.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-25 16:58:17 +00:00
Carl-Daniel Hailfinger
2925d6f11d Jedec.c was missing error handling in a few cases
Fix. jedec.c error handling used double negation in too many places for
no good reason. Clean up.

Corresponding to flashrom svn r779.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-25 16:41:50 +00:00
Adam Jurkowski
411d7c1526 Optimized write_sst_fwhub for safety and speed
Now uses block erase instead of chip erase. Also introduced auto skip
feature.

Corresponding to flashrom svn r778.

Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-25 15:04:28 +00:00