I've tested and verified the chip myself, and it seems to work
everything like supposted, since Carl-Daniel has patched flashrom to
use the read funktion on verifying.
"benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "NVIDIA MCP55", enabling flash write... OK.
Found board "GIGABYTE GA-M57SLI-S4": enabling flash write...
Serial flash segment 0xfffe0000-0xffffffff enabled
Serial flash segment 0x000e0000-0x000fffff enabled
Serial flash segment 0xffee0000-0xffefffff disabled
Serial flash segment 0xfff80000-0xfffeffff enabled
LPC write to serial flash enabled
serial flash pin 29
OK.
MX25L3205 found at physical address 0xffc00000.
Flash part is MX25L3205 (4096 KB).
Flash image seems to be a legacy BIOS. Disabling checks.
Verifying flash... VERIFIED.
benchvice flashrom # ls -l test.4mb
-rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb
Corresponding to flashrom svn r186 and coreboot v2 svn r3072.
Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r178 and coreboot v2 svn r3054.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
The #defines were already there.
Corresponding to flashrom svn r176 and coreboot v2 svn r3042.
Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Straight from the data sheet, not tested.
Corresponding to flashrom svn r175 and coreboot v2 svn r3036.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r173 and coreboot v2 svn r3032.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Improve model number printing.
Add EN29F002(A)(N)B support while I'm at it.
Corresponding to flashrom svn r172 and coreboot v2 svn r3031.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Markus Boas <bios@ryven.de>
The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.
(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)
Add support for EON EN29F002AT.
Corresponding to flashrom svn r171 and coreboot v2 svn r3030.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
This fixes a few vendor IDs to conform with JEDEC publication 106W
(JEP106W), adds some device IDs and provides information about
non-conforming IDs. The EON change is left to the patch adding EON
chips.
This patch should have no effect on code generation.
Corresponding to flashrom svn r170 and coreboot v2 svn r3029.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Fix that. Page size is uniform 256 bytes for SPI.
A sector/block size field in struct flashchip would be nice, though.
Corresponding to flashrom svn r169 and coreboot v2 svn r3027.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Untested, but verified against the data sheet.
Corresponding to flashrom svn r167 and coreboot v2 svn r3025.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32,
M25P64, M25P128.
ST M25P80 support is already there. Not tested, but conforming to data
sheets and double checked.
Corresponding to flashrom svn r166 and coreboot v2 svn r3012.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
To make it easier to add new SPI chips to flashchips.c, rename functions
with multiple possible opcodes from linear numbering at the end (_1, _2)
to include the opcode at the end (_60, _c7).
That way, you only have to take a short look at the data sheet and
choose the right function by appending the opcode listed in the data
sheet. No functional changes.
Corresponding to flashrom svn r165 and coreboot v2 svn r3009.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
Detection was tested. Print status register before erase to help
debugging block locks.
Corresponding to flashrom svn r164 and coreboot v2 svn r3008.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Detection and reading works, writing is not tested.
Corresponding to flashrom svn r158 and coreboot v2 svn r2903.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Looking through the sources of Uniflash utility I found that this chip
is no more no less than low-voltage variant of Am29F040B but with
different ID.
So I created a very quick patch (attached).
Corresponding to flashrom svn r157 and coreboot v2 svn r2897.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
The first chip the code was tested and verified with is the Macronix
MX25L4005, but other chips should work as well. Timeouts are still
hardcoded to data sheet maxima, but the status register checking code is
already there. Thanks to Harald Gutmann for the initial code on which
this is loosely based.
Corresponding to flashrom svn r152 and coreboot v2 svn r2874.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
It introduces a generic SPI host driver for the IT8716F Super I/O
which will enable easy SPI programming without having to care for the
peculiarities of the SPI host.
To activate probing for the IT8716F, you have to use the gigabyte:m57sli
mainboard override. SPI support will then use the gathered SPI host data
to access the SPI flash.
This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the
GA-M57SLI v2.0, which has a MX25L4005 SPI flash part.
Corresponding to flashrom svn r140 and coreboot v2 svn r2817.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
Corresponding to flashrom svn r136 and coreboot v2 svn r2768.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
No changes in content of the files.
Corresponding to flashrom svn r131 and coreboot v2 svn r2751.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r130 and coreboot v2 svn r2748.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r128 and coreboot v2 svn r2746.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A,
M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made by
ST.
The patch is based on the data sheets of the chips and has not been
tested at all.
Corresponding to flashrom svn r123 and coreboot v2 svn r2741.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Only reading from the chips was tested; writing support is untested.
Thanks to Gürkan Sengün <gurkan@linuks.mine.nu> for testing!
Corresponding to flashrom svn r122 and coreboot v2 svn r2740.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
so they dont mess up the initializer.
Corresponding to flashrom svn r111 and coreboot v2 svn r2689.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r110 and coreboot v2 svn r2686.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r92 and coreboot v2 svn r2565.
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r87 and coreboot v2 svn r2539.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Also add suport for NVIDIA MCP55.
Corresponding to flashrom svn r85 and coreboot v2 svn r2537.
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r77 and coreboot v2 svn r2504.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r75 and coreboot v2 svn r2502.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r74 and coreboot v2 svn r2501.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Corresponding to flashrom svn r66 and coreboot v2 svn r2450.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
X-Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r64 and coreboot v2 svn r2448.
Signed-off-by: Roman Kononov <kononov195-lbl@yahoo.com>.
X-Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
* SST_49LF040B flash support for flashrom
* add ICH4-M support to flashrom
Corresponding to flashrom svn r52 and coreboot v2 svn r2230.
Signed-off-by: Scott Tsai <scott.tsai@arima.com.tw>
* support for Winbond W39V040A
* Support for ATI SB400 (RS480 chipset)
* Support for Intel ICH7 (from Scott Tsai <scott.tsai@arima.com.tw>)
Corresponding to flashrom svn r51 and coreboot v2 svn r2229.
