I have an ASUS A7V8X-X, the BIOS programming requires a write-enable. It
has an IT8712F, just like the A7V600-X.
Corresponding to flashrom svn r929.
Signed-off-by: Russ Dill <Russ.Dill@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This also checks the testedness of boards in all cases, not just for
PCI/DMI detection.
Corresponding to flashrom svn r926.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Board enable code is untested, marked as such.
Corresponding to flashrom svn r925.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This code has been tested by Mattias Mattsson on 23. December 2009,
but without the DMI match. Now that DMI support is in and working,
the board can be added to mainline flashrom.
board info: http://www.coreboot.org/pipermail/flashrom/2009-December/001440.html
Corresponding to flashrom svn r923.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This board is like the IP35. Just changed the IDs to match.
Corresponding to flashrom svn r920.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Timothy Lepre <Klavious@gmail.com>
The message printing code greatly exceed the 80 character limit. I can
reformat it on request to obey the limit.
Intended behaviour:
on untested boards an explanation of that status is printed and the board
enable code is not run, unless the option "boardenable=force" has been
passed to the internal programmer.
Corresponding to flashrom svn r919.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Intel datasheet says "byte accesses only". Looks like they mean it.
Also fix use of or instead of and for lowering GPOs.
Corresponding to flashrom svn r910.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
The rules may change in the future, but right now it is important that
the comments match the code.
Corresponding to flashrom svn r893.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This is needed for the Intel SE440BX-2 as well as the Asus P5A.
Corresponding to flashrom svn r892.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
(Re-)tested on hardware, detection works OK.
Corresponding to flashrom svn r890.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The board doesn't need a board-enable, writing works out of the box.
Also, the board can only decode 256KB. I verified this by writing a 512KB
image of random bytes (which fails), whereas 256KB of random bytes can be
written correctly.
Corresponding to flashrom svn r887.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Add this information to the new field in the board-enable table. We match the
board via two sets of PCI IDs. However, as we don't need a board-enable
function for this board (it works out of the box; well, at least if you remove
the JP9 jumper on the board), change the code to allow NULL as value for
the board-enable function. There will likely be more boards in the future where
we want to record a maximum decode size but which don't need a board-enable.
This is hardware-tested on the GIGABYTE GA-7ZM by successfully writing a 512KB
image of random bytes to a chip in this board.
Corresponding to flashrom svn r885.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Should be functionally the same as it8705f_write_enable_2e.
Corresponding to flashrom svn r876.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This is a quick fix for board specific parallel addressing limits.
Corresponding to flashrom svn r875.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
If a board is not uniquely identifiable by PCI device/subsystem IDs, a
string can be specified to be looked for (case-sensitive, substring or
anchored) for now in one of the following DMI items in addition to matching
the PCI IDs:
- System Manufacturer
- System Product Name
- System Version
- Baseboard Manufacturer
- Baseboard Product Name
- Baseboard Version
Strings are anchored re-like (^ at the beginning, $ at the end), but
there are no plans to support full regular expressions and matched to any
of the mentioned fields.
The match is only made if DMI info is available and the string matches.
If no DMI info is available and the PCI IDs match, a warning is printed
as the board can not be autodetected.
It's still open to discussion whether we add an DMI override switch to
specify a string that will definitely match, and whether this switch is
only used if no DMI is available or whether it overrides or augments DMI
data.
DMI data is currently read using dmidecode. This tool is available for
all major platforms except MacOS X. I heard that there also is a MacOS X
version of dmidecode, but didn't investigate that.
Corresponding to flashrom svn r874.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This (hopefully obviously correct) patch fixes the issue. As a previous
version (before adding the debugging statement) was already executed on
the board, the missing OUTW was executed on the testers machine on an
earlier flashrom run.
Corresponding to flashrom svn r846.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
Only done for VT8237R (possibly needed for VT8237 too), VT8235 does
not need this (even if the original bios does so: Asus A7V8X-MX SE,
MSI KT4V were verified).
This then opens a floodgate of cleanups in the board enables.
* EPIA SP board enable vanishes, taking EPIA CN match with it.
* Asus A7V8X-MX/Tyan S2498 board enable then equals
w836xx_memw_enable_2e
* AOpen vKM400Am-S board enable then equals it8705_rom_write_enable
* Epia M board enable becomes via_vt823x_gpio15_raise
* Epia N board enable becomes via_vt823x_gpio9_raise
* Asus M2V-MX board enable becomes via_vt823x_gpio5_raise
* vt823x_gpio_set becomes via_vt823x_gpio_set, and now detects ISA
bridge itself, in concordance with intel ich and nvidia mcp gpio.
Corresponding to flashrom svn r815.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
We could run it after chipset enable, but it definitely has to happen
before board enable because the board enable usually accesses the
SuperI/O. With this patch, it is possible to add a struct superio to the
board enable table for more accurate matching in case subsystem IDs are
ambiguous. This patch focuses on the generic infrastructure aspect and
on support for IT8712F/IT8716F.
Thanks go to Adrian Glaubitz and Ward Vandewege for testing.
Corresponding to flashrom svn r813.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
- CK804, MCP04, MCP2 use the isa bridges..
- Newer nvidia mcp's do use the smbus controllers (Found by
Michael Karcher).
- gpio line check breaks EPoX EP-8RDA3+, and should be wider.
Corresponding to flashrom svn r810.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
The nulled second set of subsystem ids is correct, and this seems
to be a unique match.
Corresponding to flashrom svn r808.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: spirals <spirals@eircom.net>
- Detect max FWH size for Intel
631xESB/632xESB/3100/ICH6/ICH7/ICH8/ICH9/ICH10.
- Move IDSEL override before decode size checking for the chipsets
listed above or flashrom will complain based on old values.
- Adjust supported flash buses for the chipsets listed above (none of
them supports LPC or Parallel).
- Detect max parallel size for AMD/National Semiconductor CS5530.
- Adjust supported flash buses for CS5530/CS5530A.
- Set board-specific max decode size for Elitegroup K7VTA3.
- Set board-specific max decode size for Shuttle AK38N.
Corresponding to flashrom svn r806.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The function intel_piix4_gpo_set includes proper gpo pin checking, and
gpo pin enables when necessary.
This is a leftover from soyo SY-6BA+III code that turned out to be
unnecessary, but still used for the epox ep-bx3 board enable which it
cleans up and clarifies.
Difference to old code:
* typical bios delay io port 0xEB now never gets touched.
* pci config byte 0xB0 was not altered before.
Corresponding to flashrom svn r803.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This is needed on NetBSD and probably other non-Linux platforms.
Corresponding to flashrom svn r802.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tighten up board id match table in preparation of upcoming matching
changes.
Some boards are deliberately broken so that we will receive reports
or can remove support later (for instance, for agami aruma, which,
probably is no longer available in the wild).
* Acorp 6A815EPD: make autodetectable.
* Agami Aruma: remove bogus subsystem ids. Due to lacking secondary
main id, this match will break soon.
* GIGABYTE GA-2761GXDK: Add secondary main id. Subsystem ids are not
possible as they are all copies of the main ids. Will still require
-m.
* GIGABYTE GA-M57SLI-S4: add full set of subsystem ids. Will keep
match name for coreboot name matching.
* GIGABYTE GA-M61P-S3: Add secondary main id. Remove name match.
Probably has good subsystem ids, but no info was found. So
deliberately broken match.
* GIGABYTE GA-MA790FX-DQ6: pointless name match.
* IBM x3455: add full ids, remove name match.
* Kontron 986LCD-M: remove full id match as it is bogus. Kontron is
an embedded vendor and does not bother with subsystem ids, so
make this board name match only.
* MSI MS-6590 (KT4 Ultra): remove name match.
* MSI MS-7135 (K8N Neo3): add full id set, keep name match for
coreboot.
* VIA EPIA-N/NL: remove name match.
* VIA PC3500G: remove name match.
Corresponding to flashrom svn r796.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Expands via vt823x gpio support to also accept gpio5.
Corresponding to flashrom svn r795.
Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca>
Acked-by: Luc Verhaegen <libv@skynet.be>
SiS630 chipset enable is equal to sis540 plus superio "poking".
Superio poking equals IT8705F flash write enable, which is currently
dealt with on a board by board basis in board_enable.c. Not all
630 and newer based boards come with it8705/sis950 superios.
Corresponding to flashrom svn r794.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Turns out that the AMD 8111 datasheet describes this bit of the MCP
perfectly.
Corresponding to flashrom svn r792.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
All AK31 versions, 1.x, 2.x and 3.x are supported by this board enable.
Sadly this board can not be autodetected.
Re-uses the epox ep 8k5a2 board enable, which now lost its check for
the VT8235 ISA bridge and got renamed to w836xx_memw_enable_2e.
Corresponding to flashrom svn r790.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
* Add autodetection and remove match strings.
* Make use of vt823x_set_all_writes_to_lpc.
Corresponding to flashrom svn r789.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This code sets gpio lines on random intel ichs. Detects all currently
known intel ICHs, checks gpio lines, and then sets them accordingly.
Corresponding to flashrom svn r786.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Shuttle SFF PC is SN25P, board FN25, AMD socket 939 with an nForce4
chipset.
Config register 0x92 on the ISA bridge needs to be cleared for TBL#
to be raised. No information about individual bits of this register
is currently available.
Corresponding to flashrom svn r752.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Ulf Mehlig <ulf@ufpa.br>
- MSI MS-6153 (reported by Uwe Hermann <uwe@hermann-uwe.de>)
Tested by me on hardware. The board decodes max. 256 KB.
- MSI MS-6156 (reported by Uwe Hermann <uwe@hermann-uwe.de>)
Tested by me on hardware. The board decodes max. 256 KB.
Also, fix Dell PowerEdge 1850 name and add some more board URLs.
Corresponding to flashrom svn r749.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
SocketA + nForce2 + MCP2.
Motherboard includes a second ethernet controller and an Agere
firewire controller with valid subsystem ids, so these are used for
matching the board.
Corresponding to flashrom svn r746.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Eddie Vanhove <moonraket@hotmail.com>
This patch reorganises the board_ga_k8n_sli to create
nvidia_mcp_gpio_raise, a more general routine to set these bits.
Without docs, i can only assume that these memory area are gpio
lines.
Then it becomes easy to add support for this nForce4 SLI board.
Corresponding to flashrom svn r745.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Martin Szulecki <opensuse@sukimashita.com>
This code has been tested.
Corresponding to flashrom svn r728.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
This is a followup to r705.
Corresponding to flashrom svn r707.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Raises GP32 on IT8712F, and comes with a more general routine to set
io lines on the IT8712F.
Corresponding to flashrom svn r705.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Udu Ogah <putlinuxonit@gmail.com>
Update bad board list and remove boards where either the chipset is
not supported (not a board issue) or where we have no report in the
archives.
Corresponding to flashrom svn r703.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Mark the following boards as OK (no board-enable needed):
- Tyan S2466 (reported by Oliver Niesner <oli@servebbs.net>)
http://www.flashrom.org/pipermail/flashrom/2009-August/000211.html
Mark the following boards as non-working for now:
- ASRock K7VT4A+ (reported by Udu Ogah <putlinuxonit@gmail.com>)
Chipset detect, but no chip.
- ASUS M2N68 (reported by Udu Ogah <putlinuxonit@gmail.com>)
Chipset detect, but no chip.
- ASUS A7V600-X (reported by Udu Ogah <putlinuxonit@gmail.com>)
Chipset and chip detected, writes don't work. Board-enable required.
Also, add some missing board URLs and fix incorrect board names.
Corresponding to flashrom svn r695.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This was forgotten in flashrom svn r677 where some handcrafted MSR accesses
were still found in board-specific code.
Corresponding to flashrom svn r683.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Raises what seems to be gpio21.
Uses host controller and Promise Raid Controller for a unique match.
Tested-by: Bojan Radakovic <crnibojan@gmail.com>
Corresponding to flashrom svn r682.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
