Similar to modules using the opaque programmer framework (e.g. ICH Hardware
Sequencing) this uses a template struct flashchip element in flashchips.c with
a special probe function that fills the obtained values into that struct.
This allows yet unknown SPI chips to be supported (read, erase, write) almost
as if it was already added to flashchips.c.
Documentation used:
http://www.jedec.org/standards-documents/docs/jesd216 (2011-04)
W25Q32BV data sheet Revision F (2011-04-01)
EN25QH16 data sheet Revision F (2011-06-01)
MX25L6436E data sheet Revision 1.8 (2011-12-26)
Tested-by: David Hendricks <dhendrix@google.com>
on W25Q64CV + dediprog
Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
on a 2010 MX25L6436E with preliminary (i.e. incorrect) SFDP implementation + serprog
Thanks also to Michael Karcher for his comments and preliminary review!
Corresponding to flashrom svn r1500.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Some flash chips contain OTP memory that we cannot read or write (yet). This
prohibits us from cloning them, hence warn the user if we detect it. Not all
variations of the tagged chips contain OTP memory. They are often only
enabled on request or have there own ordering numbers. There is usually no
way to distinguish them. Because this is a supposedly seldomly used feature
the warning is shown in with dbg verbosity.
The manpage is extended to describe the backgrounds a bit.
Corresponding to flashrom svn r1493.
This patch is based on the idea and code of Daniel Lenski.
Signed-off-by: Daniel Lenski <dlenski@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
An opaque programmer does not allow direct flash access and only offers
abstract probe/read/erase/write methods.
Due to that, opaque programmers need their own infrastructure and
registration framework.
Corresponding to flashrom svn r1459.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Write and erase are NOT yet supported!
Probe and read are tested by Andrew Morgan and Uwe Hermann on Intel NICs.
Corresponding to flashrom svn r1439.
Signed-off-by: Andrew Morgan <ziltro@ziltro.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The chip code is untested, only one erase function out of two is currently
implemented, and unlocking/printlocking is not yet supported.
Thanks Mattias Mattsson <vitplister@gmail.com> for the initial patch!
Corresponding to flashrom svn r1434.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Based on the definition of SST25LF040A and the public datasheet
available here: http://www.sst.com/dotAsset/40316.pdf
Also, move the SST25LF040A up to keep the list ordered
alphabetically (while removing the ".RES" suffix).
Corresponding to flashrom svn r1415.
Signed-off-by: Zeus Castro <thezeusjuice@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Enable AAI for:
SST25VF016B
SST25VF040B{,.REMS}
SST25VF080B
Chips that support AAI via a different opcode are annotated with a comment:
SST25VF040.REMS
SST25LF040A.RES
SST25VF080B
Tested-by: Joshua Roys <roysjosh@gmail.com>
Write time (w/erase) went from 46 s to 21 s.
SST25VF016B
Tested-by: Noé Rubinstein <nrubinstein@avencall.com>
Write time (w/erase) on a dediprog went from 143 mins to 56 mins.
Corresponding to flashrom svn r1402.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Rebased and
Acked-by: Noé Rubinstein <nrubinstein@avencall.com>
It's shorter to type, and we have less problems with the 80 column limit.
Corresponding to flashrom svn r1396.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
According to the datasheets probe_w29ee011 is the only valid probe
function for those chips, but we have reports where those chips
were only detected with probe_jedec, and thus we assume that our
datasheets only cover an earlier stepping.
Corresponding to flashrom svn r1391.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Also fix a few others and remove the one for Intel 28F002BC/BL/BV/BX-T
because we need to investigate it further.
Corresponding to flashrom svn r1375.
Signed-off-by: Steven Zakulec <spzakulec@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Corresponding to flashrom svn r1323.
Signed-off-by: Steven Zakulec <spzakulec@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Peter Stuge <peter@stuge.se>
Add lock printing for AMIC A25L05PT, A25L05PU, A25L10PT, A25L10PU,
A25L20PT, A25L20PU, A25L40PT, A25L40PU, A25L80P, A25L16PT, A25L16PU,
A25L512, A25L010, A25L020, A25L040, A25L080, A25L016, A25L032, A25LQ032
to a25.c.
Add lock printing for Atmel AT26DF081A, AT26DF161, AT26DF161A,
AT26DF321.
Move Atmel AT25*/AT26* lock related functions originally added in r1115
from spi25.c to at25.c.
For SPI chips the lock printing was handled by one common function, but
sharing a common function which only is a big switch() statement doesn't
make sense, especially if we can define lock printing functions per
flash chip anyway.
The printlock function pointer in struct flashchip is used to print
status register and locking information, and serves as replacement for
implicit status register and lock printing during probe. That code will
later be changed to store locking info in a machine- accessible data
structure so flashrom can handle locked regions correctly.
Corresponding to flashrom svn r1316.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Success report with MX29F001TPC-12 at:
http://flashrom.org/pipermail/flashrom/2011-April/006132.html
Corresponding to flashrom svn r1309.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This moves 99.5% of the .data section to .rodata (which ends up in .text).
Corresponding to flashrom svn r1293.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
As the comment indicates, that function is not a chip erase function
at all, but a function calling a block eraser in a loop. So it adds
no extra value to what we already have in the block_eraser
infrastructure.
Furthermore, that function assumes a uniform sector size layout, but
is referenced from flash chip with non-uniform sector size layout, which
is just wrong.
Corresponding to flashrom svn r1287.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tests were performed with write and verify operations to 4 different
M25PX16 chips with a Dediprog SF100.
Corresponding to flashrom svn r1270.
Signed-off-by: Carl Worth <carl.d.worth@intel.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Mark EVGA nForce 780i board as supported.
Full logs are here:
http://www.flashrom.org/pipermail/flashrom/2011-January/005779.html
Corresponding to flashrom svn r1269.
Signed-off-by: Brandon Dowdy <brandonrd7@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add support for AMD Am29LV001BB, Am29LV001BT, Am29LV002BB, Am29LV002BT,
Am29LV004BB, Am29LV004BT, Am29LV008BB, Am29LV008BT.
Thanks to Mark Pustjens for testing the Am29LV001BB.
Corresponding to flashrom svn r1260.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Also bit 5 is the Erase/Program Error (EPE) bit, so has nothing to do
with the block protection. Ignore it when testing for block protections.
Corresponding to flashrom svn r1251.
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Tested-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Add code for the unlocking (erasing/writing) of Winbond W39V040FB
chips, enabling erasing/writing this type of chip.
Corresponding to flashrom svn r1248.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Print lock status for all supported Winbond W39* chips:
W39V040A, W39V040B, W39V040C, W39V040FA, W39V040FB, W39V040FC,
W39V080A, W39V080FA, W39V080FA (dual mode).
Fill in correct probe timing for Winbond W39V040C and W39V080FA.
Please note that the W39V040B/W39V040FB pair has identical IDs,
identical read/write/erase, but locking differs. Same applies to
W39V040C/W39V040FC. This causes double detection on chipsets which
support LPC and FWH, making flashing more difficult because the user
has to select the correct chip. This is called the evil twin problem.
A better evil twin handling (patch available) will resolve that problem.
Corresponding to flashrom svn r1245.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
The project is in the the process of designing and making a complete,
open source, graphics card. More info at http://wiki.opengraphics.org.
The first development card is a PCI add in card containing a couple of
FPGAs and a couple of serial flash chips (amongst other things). The
FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its
own flash and does not need to be programmed by flashrom - it ensures
that the device can enumerate on the PCI bus without needing further
configuration.
The larger FPGA is the S3. This is configured from a large SPI flash
(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is
smaller (128 KBytes). This patch adds support for programming either of
the two SPI flash chips.
The programmer device takes one configuration option which selects which
of the two flash chips is accessed. This must be set to either "cprom"
or "bprom". (The project refers to the two chips as "cprom" / "bprom",
"s3" and "bios" are more readable alternatives).
Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested
for write.
Corresponding to flashrom svn r1241.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested S25FL064A using a Bus Pirate.
Corresponding to flashrom svn r1237.
Signed-off-by: Rudy Host <segfault@committeeofdoom.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
