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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 07:23:43 +02:00

829 Commits

Author SHA1 Message Date
Carl-Daniel Hailfinger
aa000982f4 jedec: warn if toggle bit is stuck for too long and allow for delays between tries
If the JEDEC Toggle Bit algorithm needs more than 2^20 loops, it is a
good sign we should have used delays between toggle bit reads.

Tell the user about this. 2^20 loops need roughly a second depending on
flash bus speed. One reason for excessive loops can be a slow operation
like erase.

The Winbond W39V040C requires a 50 ms delay between toggle bit reads
during erase according to the datasheet. Turns out a 2 ms delay is
sufficient. Use a safety factor of 4 and default all erase operations
to 8 ms delay between toggle reads. This is short enough not to have
a substantial negative impact on erase times, and should improve
reliability.

This patch addresses the excessive toggle behaviour (observed on some
non-Winbond chips) and the toggle delay requirement (Winbond W39V040C).

Corresponding to flashrom svn r807.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Javier Ortega Conde (aka Malkavian) <malkavian666@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
2009-12-17 16:20:26 +00:00
Carl-Daniel Hailfinger
2a9e2455cd Use the maximum decode size infrastructure
- Detect max FWH size for Intel
  631xESB/632xESB/3100/ICH6/ICH7/ICH8/ICH9/ICH10.
- Move IDSEL override before decode size checking for the chipsets
  listed above or flashrom will complain based on old values.
- Adjust supported flash buses for the chipsets listed above (none of
  them supports LPC or Parallel).
- Detect max parallel size for AMD/National Semiconductor CS5530.
- Adjust supported flash buses for CS5530/CS5530A.
- Set board-specific max decode size for Elitegroup K7VTA3.
- Set board-specific max decode size for Shuttle AK38N.

Corresponding to flashrom svn r806.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-12-17 15:20:01 +00:00
Sean Nelson
c12fc71f74 Skip all delays in probe_jedec() if probe_delay is 0
Probe_jedec() checks the delay value and issues programmer_delay based
on the value except for delays between single chip_writeb. If a chip has
zero probe_delay, delays between chip_writeb should be skipped as well.

Corresponding to flashrom svn r805.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-17 04:22:40 +00:00
Carl-Daniel Hailfinger
d3abc651bc Remove nonexisting functions from chipdrivers.h
Corresponding to flashrom svn r804.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-17 04:21:12 +00:00
Luc Verhaegen
f522691658 Boards: Formalize intel piix4 gpo setting
The function intel_piix4_gpo_set includes proper gpo pin checking, and
gpo pin enables when necessary.

This is a leftover from soyo SY-6BA+III code that turned out to be
unnecessary, but still used for the epox ep-bx3 board enable which it
cleans up and clarifies.

Difference to old code:
* typical bios delay io port 0xEB now never gets touched.
* pci config byte 0xB0 was not altered before.

Corresponding to flashrom svn r803.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 10:41:58 +00:00
Jonathan A. Kollasch
b87f23b163 Use pci_fill_info() so device_class is valid
This is needed on NetBSD and probably other non-Linux platforms.

Corresponding to flashrom svn r802.

Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 04:24:42 +00:00
Zachary O Dillard
9bd5eecf45 Mark ASRock M3A790GXH/128M as supported, no board enable needed
Corresponding to flashrom svn r801.

Signed-off-by: Zachary O Dillard <teathief@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 04:11:12 +00:00
Carl-Daniel Hailfinger
9d48916de6 Fix eraseblock walking and add a few more checks to make sure such bugs get caught in the future
I found this bug during a code review. A consistency check for
eraseblock definitions has been merged as well.

Corresponding to flashrom svn r800.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-14 04:04:18 +00:00
Carl-Daniel Hailfinger
5d5c072422 Split hardware access, OS abstraction and chip drivers out of flash.h
This patch is only the first step, but it hopefully will make working
with the code and especially porting to new platforms easier.

Subsequent patches should move #includes for the newly created files
hwaccess.h and chipdrivers.h from flash.h to the files which need them.
Programmers should live in a separate header file as well.

Tested-by: Idwer Vollering <vidwer@gmail.com>

Corresponding to flashrom svn r799.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-14 03:32:24 +00:00
Adam Jurkowski
516f93219f Don't print out supported PCI devices header if all following lines are excluded from build
Corresponding to flashrom svn r798.

Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-14 03:07:31 +00:00
Carl-Daniel Hailfinger
66ef4e5ff3 Internal (onboard) programming was the only feature which could not be disabled
Make various pieces of code conditional on support for internal
programming. Code shared between PCI device programmers and onboard
programming is now conditional as well.

It is now possible to build only with dummy support:
make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no
CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no

This allows building for a specific use case only, and it also
facilitates porting to a new architecture because it is possible to
focus on highlevel code only.

Note: Either internal or dummy programmer needs to be compiled in due to
the current behaviour of always picking a default programmer if -p is
not specified. Picking an arbitrary external programmer as default  
wouldn't make sense.

Build and runtime tested in all 1024 possible build combinations. The
only failures are by design as mentioned above.

Corresponding to flashrom svn r797.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-13 22:28:00 +00:00
Luc Verhaegen
a7e30503fa Boards: Tighten up ID match list
Tighten up board id match table in preparation of upcoming matching
changes.

Some boards are deliberately broken so that we will receive reports
or can remove support later (for instance, for agami aruma, which,
probably is no longer available in the wild).

* Acorp 6A815EPD: make autodetectable.
* Agami Aruma: remove bogus subsystem ids. Due to lacking secondary
  main id, this match will break soon.
* GIGABYTE GA-2761GXDK: Add secondary main id. Subsystem ids are not
  possible as they are all copies of the main ids. Will still require
  -m.
* GIGABYTE GA-M57SLI-S4: add full set of subsystem ids. Will keep
  match name for coreboot name matching.
* GIGABYTE GA-M61P-S3: Add secondary main id. Remove name match.
  Probably has good subsystem ids, but no info was found. So
  deliberately broken match.
* GIGABYTE GA-MA790FX-DQ6: pointless name match.
* IBM x3455: add full ids, remove name match.
* Kontron 986LCD-M: remove full id match as it is bogus. Kontron is
  an embedded vendor and does not bother with subsystem ids, so
  make this board name match only.
* MSI MS-6590 (KT4 Ultra): remove name match.
* MSI MS-7135 (K8N Neo3): add full id set, keep name match for
  coreboot.
* VIA EPIA-N/NL: remove name match.
* VIA PC3500G: remove name match.

Corresponding to flashrom svn r796.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-09 11:39:02 +00:00
David Bartley
f58d364f1a Boards: Add Asus M2V-MX
Expands via vt823x gpio support to also accept gpio5.

Corresponding to flashrom svn r795.

Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca>
Acked-by: Luc Verhaegen <libv@skynet.be>
2009-12-09 07:53:01 +00:00
Luc Verhaegen
9892ca6b94 Chipset: remove sis630 chipset enable for sis540
SiS630 chipset enable is equal to sis540 plus superio "poking".

Superio poking equals IT8705F flash write enable, which is currently
dealt with on a board by board basis in board_enable.c. Not all
630 and newer based boards come with it8705/sis950 superios.

Corresponding to flashrom svn r794.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-12-09 07:43:13 +00:00
Maciej Pijanka
a661e15d52 Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI)
Corresponding to flashrom svn r793.

Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-12-08 17:26:24 +00:00
Luc Verhaegen
96f88fbcb6 Boards: Add general nVidia MCP gpio routine
Turns out that the AMD 8111 datasheet describes this bit of the MCP
perfectly.

Corresponding to flashrom svn r792.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-12-03 12:25:34 +00:00
Idwer Vollering
fcd070ef96 Mark the following boards as OK (no board-enable needed)
- AsRock K8S8X (reported by Adrian Glaubitz <adrian.glaubitz@gmail.com>)
   http://www.flashrom.org/pipermail/flashrom/2009-November/000937.html

 - ASUS K8V-X SE (reported by Adrian Glaubitz <adrian.glaubitz@gmail.com>)
   http://www.flashrom.org/pipermail/flashrom/2009-November/000965.html

 - DFI Blood-Iron P35 T2RL (reported by Erno Vaurio <ernovaur@gmail.com>)
   http://www.flashrom.org/pipermail/flashrom/2009-November/001059.html

Corresponding to flashrom svn r791.

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-12-01 12:55:18 +00:00
Luc Verhaegen
0f9221c8f1 Board enable for Shuttle AK31
All AK31 versions, 1.x, 2.x and 3.x are supported by this board enable.
Sadly this board can not be autodetected.

Re-uses the epox ep 8k5a2 board enable, which now lost its check for
the VT8235 ISA bridge and got renamed to w836xx_memw_enable_2e.

Corresponding to flashrom svn r790.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
2009-11-29 01:19:25 +00:00
Luc Verhaegen
4802a7b275 Boards: Fix up MSI KT4V board enable
* Add autodetection and remove match strings.
* Make use of vt823x_set_all_writes_to_lpc.

Corresponding to flashrom svn r789.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-28 21:12:58 +00:00
Luc Verhaegen
6c5d4cc608 Boards: Add Asus P4B266LM (Sony Vaio PCV-RX650)
Corresponding to flashrom svn r788.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Allan Bjorklund <abjork@speakeasy.net>
2009-11-28 18:26:21 +00:00
Luc Verhaegen
1265d8d3fb Boards: Add board match for Asrock P4i65GV
Corresponding to flashrom svn r787.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Idwer Vollering <vidwer@gmail.com>
2009-11-28 18:16:31 +00:00
Luc Verhaegen
60ea7dc95f Boards: provide enormous intel_ich_gpio_set function
This code sets gpio lines on random intel ichs. Detects all currently
known intel ICHs, checks gpio lines, and then sets them accordingly.

Corresponding to flashrom svn r786.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Idwer Vollering <vidwer@gmail.com>
2009-11-28 18:07:51 +00:00
Michael Karcher
1c296ca8bc Use common jedec functionality where appropriate
The deleted function in en29f002a.c is reintroduced as
write_by_byte_jedec in jedec.c as it contains no chip-specific
instructions. It is not yet used in other chip drivers, as key addresses
(0x2AAA/0x5555) are often specified with less bits. After crosschecking
datasheets, most of the fixmes can probably be resolved as indicated in
them, causing significant code reduction.

The common JEDEC code for bytewise programming does not program 0xFF
at all. The chips that had a dedicated bytewise flash function which
has been changed to write_jedec_1 thus changed flashing behaviour
and the "write" test flag has been removed. This applies to: AMD
Am29F002BB/Am29F002NBB AMD Am29F002BT/Am29F002NBT (TEST_OK_PREW before)
AMIC A29002B AMIC A29002T (TEST_OK_PREW before) EON EN29F002(A)(N)B EON
EN29F002(A)(N)T (TEST_OK_PREW before) Macronix MX29F001B (TEST_OK_PREW
before) Macronix MX29F001T (TEST_OK_PREW before) Macronix MX29F002B
Macronix MX29F002T (TEST_OK_PREW before) Macronix MX29LV040

Similar analysis should be performed for the read id stuff.

Corresponding to flashrom svn r785.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-27 17:49:42 +00:00
Carl-Daniel Hailfinger
797a8346cf Add support for Intel 3400 series / 5 series chipset
Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400
Series Chipset Specification Update).
According to http://pciids.sourceforge.net/ we probably should match all
IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the
same.
If anybody has contacts at Intel and can check, I'd be happy to add the
rest of the IDs.

Corresponding to flashrom svn r784.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-26 16:51:39 +00:00
Michael Karcher
972cec282c Refine support for the JEDEC Software Data Protection
This patch removes the extremely dangerous unprotect_jedec function
which is not used at all within flashrom code, and renames the
misleadingly named protect_jedec function to start_program_jedec.

Calls to protect_jedec after flashing are removed, because a) on LPC
chips, the command sent by protoct_jedec is not even in the datasheet
and b) on parallel chips, the block write command issued before already
contained the software protection sequence, so software protection is
definitely enabled.

This patch also removes two clones of protect_jedec

Background: JEDEC Software Data Protection started as an optional
feature, which was disabled on the first single-voltage-flash chips.
The software data protection is the need to prefix a write with a magic
"write enable" command, while without write protection every write
access into the chip's address space modifies flash content. This magic
write enable command also tells the flash chip that the programmer
obviously support sending write-enable commands and turns off the "any
write modifies flash content" mode. There also exist a two-command (6
writes) sequence that disables Software Data Protection completey, which
should only ever be used to prepare updating with a device that can't
handle software data protection.

Corresponding to flashrom svn r783.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-26 14:50:52 +00:00
Zheng Bao
1db2b75902 Add entries of W25x32 and W25x64
The model_ids are already in the header.

W25x32 has been successfully probed. W25x64 is not available, the entry
is based on the datasheet.

Corresponding to flashrom svn r782.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-26 11:05:01 +00:00
Carl-Daniel Hailfinger
d0250a3afd Clarify a comment about verification routine usage
Corresponding to flashrom svn r781.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-25 17:05:52 +00:00
Carl-Daniel Hailfinger
b7e01457d1 Reduce realloc syscall overhead for FT2232 and bitbang
FT2232 ran realloc() for every executed command. Start with a big enough
buffer and don't touch buffer size unless it needs to grow.
Bitbang was slightly better: It only ran realloc() if buffer size
changed. Still, the solution above improves performance and reliability.

Corresponding to flashrom svn r780.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-25 16:58:17 +00:00
Carl-Daniel Hailfinger
2925d6f11d Jedec.c was missing error handling in a few cases
Fix. jedec.c error handling used double negation in too many places for
no good reason. Clean up.

Corresponding to flashrom svn r779.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-25 16:41:50 +00:00
Adam Jurkowski
411d7c1526 Optimized write_sst_fwhub for safety and speed
Now uses block erase instead of chip erase. Also introduced auto skip
feature.

Corresponding to flashrom svn r778.

Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-25 15:04:28 +00:00
Carl-Daniel Hailfinger
96123034f4 Kill hardcoded block erase on ICH SPI
The existing code does not work for all SPI chips, and it just was a
band-aid to cope with locked down chipsets back in a time when there was
no eraseblock infrastructure.
Basically, this unbreaks a few SPI chips on ICH.

Corresponding to flashrom svn r777.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>
2009-11-25 02:07:30 +00:00
Carl-Daniel Hailfinger
d5b28fae1d Add the ability to set Bus Pirate SPI speed via the command line
Example usage:
flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo
flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M

Refactor programmer option parsing (this allows cleanups in other
programmers as well).

Increase SPI read size from 8 to 12 bytes (current single-transaction
limit of the Bus Pirate raw SPI protocol).

Add Bus Pirate to the list of programmers supporting 4 byte RDID.

Add Bus Pirate syntax to the man page.

Tested-by: Sean Nelson <audiohacked@gmail.com>

Corresponding to flashrom svn r776.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-24 18:27:10 +00:00
Sean Nelson
d70b09ca13 Add Sanyo LF25FW203A support
This chip is sometimes labeled as 25FW203T.

Corresponding to flashrom svn r775.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-24 02:11:08 +00:00
Sean Nelson
118e1d6d04 Add Generic SPI RDID detection for Sanyo chips
Corresponding to flashrom svn r774.

Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-24 02:08:11 +00:00
Carl-Daniel Hailfinger
b2ecf6c9eb Revert debug compilation which was committed in r772 by accident
Corresponding to flashrom svn r773.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-24 00:23:33 +00:00
Carl-Daniel Hailfinger
5cca01f394 Cleanly validate ICH SPI preopcodes
The code should work on Linux/*BSD/MacOSX and relies on the serial code
implementation in serial.c. Support for additional platforms (Windows)
will have to be added to serial.c for this to work. For tests without a
Bus Pirate (or with non-functional serial code) it is possible to
#define FAKE_COMMUNICATION in buspirate_spi.c.
Thanks to Sean Nelson for the SPI mode settings code. I tweaked it a bit
to make configuration from a commandline easier should anybody want that
feature.

Tested-by: Sean Nelson <audiohacked@gmail.com>

Corresponding to flashrom svn r772.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
2009-11-24 00:20:03 +00:00
Carl-Daniel Hailfinger
e51ea10a88 Move serial handling from serprog.c to serial.c
This is the first step in enabling platform independent serprog and it
also allows other drivers to use serial port functionality without
requiring serprog.

Pure code move, no code changed.

Corresponding to flashrom svn r771.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-11-23 19:20:11 +00:00
Carl-Daniel Hailfinger
eaac68bf8b Add the ability to generate test patterns for write testing
This will be useful once we create a --test function for flashrom.

The test patterns make it easy to find skipped and duplicated bytes, are
human readable, and the first 8 of them have block numbers to detect
aliasing or wraparounds. Current size limit for aliasing detection is
16 MByte, but since neither LPC nor FWH nor SPI chips exist with bigger
sizes, this is reasonably safe.

Detailed documentation is available as source code comments above the
new function generate_testpattern().

Corresponding to flashrom svn r770.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>
2009-11-23 12:55:31 +00:00
Carl-Daniel Hailfinger
a2441cef65 ft2232_spi: add some error handling
Pretty much everybody who used the FT2232 SPI driver had problems with
incorrect reads from time to time. One reason was that the hardware is
pretty timing sensitive even for reads.

The other reason was that the code silently ignored errors. This patch
doesn't add any error recovery, but it will emit error messages if
FT2232 communication goes wrong. That allows us to track down errors
without investing hours in driver debugging.

Thanks to Jeremy Buseman <naviathan@gmail.com> for testing. He found out
that certain libftdi/libusb/kernel/hardware combinations drop some bytes
without returning any error codes.

Corresponding to flashrom svn r769.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Paul Fox <pgf@laptop.org>
2009-11-22 01:33:40 +00:00
Carl-Daniel Hailfinger
a4a9bfb228 Bus Pirate support needs serial communication
Serprog already has such functionality, so it makes sense to share that.
TODO: Factor out serial communication into a separate file, have that
code be available even if serprog is not selected and make it portable
(it is very Linux-centric right now).

Corresponding to flashrom svn r768.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
2009-11-21 11:02:48 +00:00
Carl-Daniel Hailfinger
01d49ed39d Add support for generic RDID and REMS matching of unknown chips
If a chip is not on the RDID generic vendor list nor on the REMS
specific ID list, flashrom will claim that no chip is there.

Handle these cases gracefully. flashrom will ignore generic matches if a
specific chip was found, so this will have no impact on supported chips,
but help a lot for a first quick analysis by the user or developer. The
only drawback is that unknown chips may be recognized multiple times
until they are added to flashchips.[ch].

Corresponding to flashrom svn r767.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marcj303@gmail.com>
2009-11-20 01:12:45 +00:00
Carl-Daniel Hailfinger
f52920581d Refactor main loop in preparation of libflashrom
To prepare for libflashrom I wanted to make the main loop more readable and more correct and factor out stuff which can be useful in libflashrom.

- Factor out printing of supported devices to print.c.
- Adjust name of wiki printing function to fit the pattern.
- Abort if the user specified --verify and --noverify at the same time.
- Check for extra parameters which don't fit commandline syntax.

Corresponding to flashrom svn r766.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
2009-11-17 09:57:34 +00:00
Carl-Daniel Hailfinger
6161ff1880 Fix incorrect comment about wiki printing in Makefile
Spotted by Benjamin BELLEC <b.bellec@gmail.com>

Corresponding to flashrom svn r765.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-16 21:22:24 +00:00
Carl-Daniel Hailfinger
3efc51c1bc If a SPI command taking an address does fail, we want to know the address for easier debugging
Vincent wrote: This patch provided help to debug the partial write on
ICH in descriptor mode.

Corresponding to flashrom svn r764.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Vincent S. Cojot <openlook@cojot.name>
2009-11-16 15:03:35 +00:00
Idwer Vollering
7a0d94741d Add URLs for boards ASUS K8V, ASUS K8V SE Deluxe, Elitegroup K7S5A
Add a note for ASUS M2N-E.
Change "iff" to "if". Most people don't understand what "iff" means and
the meaning of both words is close enough to hopefully give users the
right idea.

Corresponding to flashrom svn r763.

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-16 14:13:09 +00:00
Jörg Mayer
8776db2372 Retrieve linker flags for libftdi with pkg-config
Retrieve the proper linker flags for libftdi via pkg-config and fall
back if pkg-config isn't available or if it doesn't know libftdi.

Fix $LIBS and $FEATURE_LIBS to honor dependency order.

The original patch is from Jörg, it has been updated by Carl-Daniel to
work on the current tree and to have a fallback in case pkg-config is
not available or not working.

Corresponding to flashrom svn r762.

Signed-off-by: Jörg Mayer <jmayer@loplof.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jörg Mayer <jmayer@loplof.de>
2009-11-16 14:05:13 +00:00
Carl-Daniel Hailfinger
754580e4eb svn:ignore .libdeps
Corresponding to flashrom svn r761.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-15 17:23:59 +00:00
Carl-Daniel Hailfinger
6a0269e491 Mark Elitegroup K7S5A as supported
Mark SiS 735 as supported.

Remove "SiS" from the model number to avoid printing it twice.

Reported by Adrian Glaubitz.

Corresponding to flashrom svn r760.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-15 17:20:21 +00:00
Carl-Daniel Hailfinger
9f46cfca38 Add support for every single SiS chipset out there
The two existing SiS chipset enables (compared to the 28 in this patch)
were refactored, and one of them was fixed.

A function to match PCI vendor/class combinations was added to generic
code.

Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some
PCI settings seem to be inaccessible, but it still works).

This is not based on any docs, but rather on detailed analysis
of existing opensource code for some of the chipsets.

Thanks to for Adrian Glaubitz testing.

Corresponding to flashrom svn r759.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
2009-11-15 17:13:29 +00:00
Carl-Daniel Hailfinger
964f27498b Mark "Asus K8V" as supported
Reported by martin f krafft <madduck@madduck.net>

Mark "Asus K8V SE Deluxe" as supported. Reported by Luke Dashjr
<luke_coreboot@dashjr.org>

Corresponding to flashrom svn r758.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-11-14 03:58:58 +00:00