This is done by using the generic SPI interface.
Corresponding to flashrom svn r239 and coreboot v2 svn r3325.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Only a subset has been added to flashchips.c, but the IDs in flash.h
will make lookups easier if anybody wants to add support for them.
Corresponding to flashrom svn r236 and coreboot v2 svn r3321.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add support for the JEDEC RES (Read Electronic Signature and Resume from
Powerdown) SPI command to identify older SPI chips which can't handle
JEDEC RDID.
Since RES gives a one-byte identifier which is shared among many
different vendors and even different sizes, we want to match RES as a
last resort if RDID returns 0xff 0xff 0xff.
Corresponding to flashrom svn r235 and coreboot v2 svn r3320.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
This is a heavily reworked version of a patch by Fredrik Tolf, which was
Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
Flash chips which can be detected by JEDEC probe routines all have
vendor IDs with correct parity. Use a parity check as additional hint
whether a vendor ID makes sense. Note: Device IDs have no parity
requirements whatsoever.
Corresponding to flashrom svn r231 and coreboot v2 svn r3308.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Add a few flashchips already mentioned in flash.h to flashchips.c
Corresponding to flashrom svn r230 and coreboot v2 svn r3306.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
SST39VF040 has been confirmed to probe OK by misi e.
Corresponding to flashrom svn r226 and coreboot v2 svn r3300.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The SST39LF series has the same IDs. Add short AMIC vendor ID to
flashrom.
Corresponding to flashrom svn r225 and coreboot v2 svn r3299.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
This is a very early step toward cleaning up SPI code in flashrom.
Corresponding to flashrom svn r223 and coreboot v2 svn r3295.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE.
8 bits out of 32 are in use now. No bits set means nothing has been tested.
For chips with at least one operation that is not tested or not working, the
user is asked to email a report to a special email adress so that the table
can be updated.
All chips are TEST_UNTESTED for now.
Corresponding to flashrom svn r221 and coreboot v2 svn r3277.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The generic jedec.c does not work for the ST M50FLW flash devices,
because they need an unlock command first. For this reason, ST M50FLW
support is moved to a new HW support module, because any change in
jedec.c would bear the risk to cause problems with the already supported
devices.
It's already tested with ST M50FLW080A; the other chips of this family i
dont have available, so i couldnt test it.
Corresponding to flashrom svn r219 and coreboot v2 svn r3274.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Support for flashing on the Kontron 986LCD-M board.
Corresponding to flashrom svn r213 and coreboot v2 svn r3165.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r209 and coreboot v2 svn r3146.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Cosmetic changes in some files, partly bending the 80-characters-per-line
rule in this special case, as the 80-character-limited version looks
equally crappy even in an 80x25 console/xterm, so let's make it at least
look good in a high-resolution xterm.
Corresponding to flashrom svn r203 and coreboot v2 svn r3139.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Some vendors like Programmable Micro Corp (PMC) need this. Both the
serial and parallel flash JEDEC detection routines would benefit from a
parity/sanity check of the vendor ID. Will do this later.
Add support for the PMC Pm25LV family of SPI flash chips.
Corresponding to flashrom svn r191 and coreboot v2 svn r3091.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Chris Lingard <chris@stockwith.co.uk>
Corresponding to flashrom svn r178 and coreboot v2 svn r3054.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r173 and coreboot v2 svn r3032.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Improve model number printing.
Add EN29F002(A)(N)B support while I'm at it.
Corresponding to flashrom svn r172 and coreboot v2 svn r3031.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Markus Boas <bios@ryven.de>
The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.
(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)
Add support for EON EN29F002AT.
Corresponding to flashrom svn r171 and coreboot v2 svn r3030.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
This fixes a few vendor IDs to conform with JEDEC publication 106W
(JEP106W), adds some device IDs and provides information about
non-conforming IDs. The EON change is left to the patch adding EON
chips.
This patch should have no effect on code generation.
Corresponding to flashrom svn r170 and coreboot v2 svn r3029.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32,
M25P64, M25P128.
ST M25P80 support is already there. Not tested, but conforming to data
sheets and double checked.
Corresponding to flashrom svn r166 and coreboot v2 svn r3012.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
To make it easier to add new SPI chips to flashchips.c, rename functions
with multiple possible opcodes from linear numbering at the end (_1, _2)
to include the opcode at the end (_60, _c7).
That way, you only have to take a short look at the data sheet and
choose the right function by appending the opcode listed in the data
sheet. No functional changes.
Corresponding to flashrom svn r165 and coreboot v2 svn r3009.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
Detection was tested. Print status register before erase to help
debugging block locks.
Corresponding to flashrom svn r164 and coreboot v2 svn r3008.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per
http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html
Corresponding to flashrom svn r162 and coreboot v2 svn r2997.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Detection and reading works, writing is not tested.
Corresponding to flashrom svn r158 and coreboot v2 svn r2903.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Looking through the sources of Uniflash utility I found that this chip
is no more no less than low-voltage variant of Am29F040B but with
different ID.
So I created a very quick patch (attached).
Corresponding to flashrom svn r157 and coreboot v2 svn r2897.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
The first chip the code was tested and verified with is the Macronix
MX25L4005, but other chips should work as well. Timeouts are still
hardcoded to data sheet maxima, but the status register checking code is
already there. Thanks to Harald Gutmann for the initial code on which
this is loosely based.
Corresponding to flashrom svn r152 and coreboot v2 svn r2874.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
The SPI chip finding and SPI chip accessor code is moved as well. This
can be split later if we feel like it.
The non-use of svn cp is intentional because the only history we'd
have to preserve are a few commits which were early prototypes of chip
identification code. For those who intend to look at that history, they
can look at board_enable.c revision 2853.
Corresponding to flashrom svn r145 and coreboot v2 svn r2857.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
It introduces a generic SPI host driver for the IT8716F Super I/O
which will enable easy SPI programming without having to care for the
peculiarities of the SPI host.
To activate probing for the IT8716F, you have to use the gigabyte:m57sli
mainboard override. SPI support will then use the gathered SPI host data
to access the SPI flash.
This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the
GA-M57SLI v2.0, which has a MX25L4005 SPI flash part.
Corresponding to flashrom svn r140 and coreboot v2 svn r2817.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
Corresponding to flashrom svn r137 and coreboot v2 svn r2769.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r136 and coreboot v2 svn r2768.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
No changes in content of the files.
Corresponding to flashrom svn r131 and coreboot v2 svn r2751.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r128 and coreboot v2 svn r2746.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A,
M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made by
ST.
The patch is based on the data sheets of the chips and has not been
tested at all.
Corresponding to flashrom svn r123 and coreboot v2 svn r2741.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Only reading from the chips was tested; writing support is untested.
Thanks to Gürkan Sengün <gurkan@linuks.mine.nu> for testing!
Corresponding to flashrom svn r122 and coreboot v2 svn r2740.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r113 and coreboot v2 svn r2691.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
so they dont mess up the initializer.
Corresponding to flashrom svn r111 and coreboot v2 svn r2689.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r110 and coreboot v2 svn r2686.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
changes are needed.
Corresponding to flashrom svn r108 and coreboot v2 svn r2643.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
