This patch adds SB700 support to flashrom. The code for enabling the flash
rom is the same as for SB600. It was tested (read, write, verify) with an
ASUS M3A-H/HDMI which contains a Macronix MX25L8005.
Corresponding to flashrom svn r361 and coreboot v2 svn r3799.
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Acked-by: Peter Stuge <peter@stuge.se>
This has been tested by Uwe Hermann on an RS690/SB600 board.
Corresponding to flashrom svn r351 and coreboot v2 svn r3779.
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This helps a lot if we have to track down configuration weirdnesses.
Corresponding to flashrom svn r338 and coreboot v2 svn r3723.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r332 and coreboot v2 svn r3706.
Signed-off-by: Ed Swierk <eswierk@aristanetworks.com>
Acked-by: Ed Swierk <eswierk@aristanetworks.com>
Untested, but should work just as well as the other *PIIX* southbridges
according to the datasheets.
Corresponding to flashrom svn r330 and coreboot v2 svn r3696.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r326 and coreboot v2 svn r3669.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Based on the 5595 datasheet and uniflash 1.40 sources, only looking for info
about SiS620.
Corresponding to flashrom svn r325 and coreboot v2 svn r3668.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
It is not possible to write enable that area once the register is set so
print a warning.
Corresponding to flashrom svn r324 and coreboot v2 svn r3659.
Signed-off-by: Marc Jones <marcj.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash
interfaces, so this just adds the required PCI IDs.
Corresponding to flashrom svn r323 and coreboot v2 svn r3648.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r298 and coreboot v2 svn r3414.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
At some point the flash bus will be part of struct flashchip.
Pardon me for pushing this in, but I think it is important to beware of further
decay and it will improve things for other developers in the short run.
Carl-Daniel, I will consider your suggestions in another patch. I want to keep
things from getting too much for now. The patch includes Rudolf's VIA SPI
changes though.
Corresponding to flashrom svn r285 and coreboot v2 svn r3401.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
It is similar with few documented exceptions to ICH7 SPI controller.
Corresponding to flashrom svn r282 and coreboot v2 svn r3398.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back
to 0 when BOOT BIOS Straps indicate something else than SPI.
Also fixes a build error in ichspi.c with gcc 4.2.2.
Corresponding to flashrom svn r280 and coreboot v2 svn r3395.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ICH7 SPI support
* fix some variable names in ichspi.c (Offset -> offset)
* Dump ICH7 SPI bar with -V
* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)
Corresponding to flashrom svn r278 and coreboot v2 svn r3393.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
- Fix typos and inconsistencies.
- Drop duplicate line which tells us the chip name twice.
- Also print the chip vendor, not only the name.
Corresponding to flashrom svn r249 and coreboot v2 svn r3348.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Corresponding to flashrom svn r245 and coreboot v2 svn r3344.
Signed-off-by: Andriy Gapon <avg@icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add ICH8 support to the ICH9 code.
Corresponding to flashrom svn r241 and coreboot v2 svn r3327.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This is done by using the generic SPI interface.
Corresponding to flashrom svn r239 and coreboot v2 svn r3325.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r220 and coreboot v2 svn r3275.
Signed-off-by: Bari Ari <bari@onelabs.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Straight from the datasheet, untested.
Corresponding to flashrom svn r215 and coreboot v2 svn r3167.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Functionality (except printing) should be unchanged.
Corresponding to flashrom svn r207 and coreboot v2 svn r3144.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Ward says:
This code detects the ICH8 chipset on my laptop, and it appears to use
SPI.
Acked-by: Ward Vandewege <ward@gnu.org>
Cosmetic changes in some files, partly bending the 80-characters-per-line
rule in this special case, as the 80-character-limited version looks
equally crappy even in an 80x25 console/xterm, so let's make it at least
look good in a high-resolution xterm.
Corresponding to flashrom svn r203 and coreboot v2 svn r3139.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- Remove the "enable write to flash" message, as the caller appears to
already report that.
- Move the 'modprobe msr' suggestions to the first lseek64 error handling, as
we get an error there already.
- Rename a perror string from "read" to "read msr", as we use the latter
already in this function for another read.
Corresponding to flashrom svn r195 and coreboot v2 svn r3101.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Also, move a big code comment to the top of enable_flash_cs5536().
Corresponding to flashrom svn r193 and coreboot v2 svn r3098.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This implements support for devices using AMD Geode companion chip
CS5536 that have the Boot ROM on NOR flash that is directly connected to
FLASH_CS3 (Boot Flash Chip Select). We need to write enable it in the
NORF_CTL MSR register for flashrom to be able to write to it, including
JEDEC probe commands.
This patch allows us to stop using AMD gx_utils.ko for BIOS flashing on
the DBE61.
Corresponding to flashrom svn r192 and coreboot v2 svn r3097.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r188 and coreboot v2 svn r3078.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Tested on the pcengines alix1c and works fine.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per
http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html
Corresponding to flashrom svn r162 and coreboot v2 svn r2997.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Attached is a patch that enables AMD Geode CS5536 chipset support. I
have tested it successfully on a MSM800 board from digital logic.
Corresponding to flashrom svn r160 and coreboot v2 svn r2967.
Signed-off-by: Lane Brooks <lbrooks@mit.edu>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
Detection and reading works, writing is not tested.
Corresponding to flashrom svn r158 and coreboot v2 svn r2903.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r151 and coreboot v2 svn r2873.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This has been confirmed by Ed Swierk in
http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html .
Corresponding to flashrom svn r150 and coreboot v2 svn r2868.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r143 and coreboot v2 svn r2847.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r142 and coreboot v2 svn r2846.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r138 and coreboot v2 svn r2770.
Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
No changes in content of the files.
Corresponding to flashrom svn r131 and coreboot v2 svn r2751.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r130 and coreboot v2 svn r2748.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r128 and coreboot v2 svn r2746.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
The previous code was pretty unreadable, undocumented and did some totally
unrelated things (such as mucking with the game port or port 0x92).
This version is tested with a 256 KB chip and should work for the
CS5530 and CS5530A.
Corresponding to flashrom svn r120 and coreboot v2 svn r2715.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r119 and coreboot v2 svn r2713.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r118 and coreboot v2 svn r2712.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Tested on IBM x3455.
Corresponding to flashrom svn r117 and coreboot v2 svn r2711.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add support for the ALi M1533 to chipset_enable.c
* Add some SMBus poking needed for the ASUS P5A, to board_enable.c
Since PCI subsystem IDs are worthless with this board, people will
have to name the board directly.
Corresponding to flashrom svn r109 and coreboot v2 svn r2677.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
changes are needed.
Corresponding to flashrom svn r108 and coreboot v2 svn r2643.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
