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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 07:23:43 +02:00
Carl-Daniel Hailfinger 5100a8a9ae Generic status register prettyprinting for SST25*
Even if we don't tell the user about the areas the block locking bits
correspond to, printing a detailed list of which lock bits are set is a
definite improvement.

Corresponding to flashrom svn r505.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Sample output:
[...]
Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a.
probe_spi_rdid_generic: id1 0xbf, id2 0x254a
Chip status register is 1c
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not
set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is set
Chip status register: Bit 3 / Block Protect 1 (BP1) is set
Chip status register: Bit 2 / Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000.

Acked-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>
2009-05-13 22:51:27 +00:00
2007-09-08 14:36:01 +00:00
2009-05-08 17:43:22 +00:00
2009-05-13 12:01:57 +00:00
2009-05-05 16:15:46 +00:00

-------------------------------------------------------------------------------
flashrom README
-------------------------------------------------------------------------------

flashrom is a utility for reading, writing, verifying and erasing flash ROM
chips. It's often used to flash BIOS/coreboot/firmware images.

It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
or SPI.

(see http://coreboot.org for details on coreboot)


Build Requirements
------------------

To build flashrom you need to install the following packages or ports:

Linux et al:

 * pciutils
 * pciutils-devel / pciutils-dev / libpci-dev
 * zlib-devel / zlib1g-dev

On FreeBSD, you need the following ports:

 * devel/gmake
 * devel/libpci

To compile on Linux, use:

 make

To compile on FreeBSD, use:

 gmake

To compile on Solaris, use:

 gmake LDFLAGS="-L$pathtolibpci -lpci -lz" CC="gcc -I$pathtopciheaders" \
       CFLAGS=-O2

To compile on DragonFly BSD, use:

 ln -s /usr/pkg/include/pciutils pci
 gmake CFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -lpci -lz"

To compile and run on Darwin/Mac OS X:

 Install DirectIO from coresystems GmbH.
 DirectIO is available at http://www.coresystems.de/en/directio.


Usage / Options
---------------

Please see the flashrom(8) manpage.


Exit status
-----------

Please see the flashrom(8) manpage.


coreboot Table and Mainboard Identification
--------------------------------------------

Please see the flashrom(8) manpage.


ROM Layout Support
------------------

Please see the flashrom(8) manpage.


Supported Flash Chips / Chipsets / Mainboards
---------------------------------------------

Please check the output of 'flashrom -L' for the list of supported
flash chips, chipsets/southbridges, and mainboards.

See also http://coreboot.org/Flashrom for more details.

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