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	Change-Id: I9910cd1f5850a6f86e26bb1dc4ff26614f0a0964 Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/88270 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
		
			
				
	
	
		
			184 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			184 lines
		
	
	
		
			5.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * This file is part of the flashrom project.
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 *
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 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; version 2 of the License.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include "programmer.h"
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#include "spi.h"
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#include "platform/udelay.h"
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/* Note that CS# is active low, so val=0 means the chip is active. */
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static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val, void *spi_data)
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{
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	master->set_cs(val, spi_data);
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}
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static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val, void *spi_data)
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{
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	master->set_sck(val, spi_data);
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}
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static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master, void *spi_data)
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{
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	if (master->request_bus)
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		master->request_bus(spi_data);
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}
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static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master, void *spi_data)
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{
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	if (master->release_bus)
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		master->release_bus(spi_data);
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}
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static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi,
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					void *spi_data)
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{
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	if (master->set_sck_set_mosi) {
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		master->set_sck_set_mosi(sck, mosi, spi_data);
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		return;
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	}
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	master->set_sck(sck, spi_data);
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	master->set_mosi(mosi, spi_data);
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}
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static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck,
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					void *spi_data)
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{
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	if (master->set_sck_get_miso)
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		return master->set_sck_get_miso(sck, spi_data);
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	master->set_sck(sck, spi_data);
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	return master->get_miso(spi_data);
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}
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static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master, void *spi_data)
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{
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	uint8_t ret = 0;
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	int i;
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	for (i = 7; i >= 0; i--) {
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		if (i == 0)
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			bitbang_spi_set_sck_set_mosi(master, 0, 0, spi_data);
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		else
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			bitbang_spi_set_sck(master, 0, spi_data);
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		default_delay(master->half_period);
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		ret <<= 1;
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		ret |= bitbang_spi_set_sck_get_miso(master, 1, spi_data);
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		default_delay(master->half_period);
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	}
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	return ret;
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}
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static void bitbang_spi_write_byte(const struct bitbang_spi_master *master, uint8_t val, void *spi_data)
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{
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	int i;
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	for (i = 7; i >= 0; i--) {
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		bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1, spi_data);
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		default_delay(master->half_period);
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		bitbang_spi_set_sck(master, 1, spi_data);
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		default_delay(master->half_period);
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	}
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}
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struct bitbang_spi_master_data {
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	const struct bitbang_spi_master *master;
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	void *spi_data;
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};
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static int bitbang_spi_send_command(const struct flashctx *flash,
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				    unsigned int writecnt, unsigned int readcnt,
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				    const unsigned char *writearr,
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				    unsigned char *readarr)
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{
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	unsigned int i;
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	const struct bitbang_spi_master_data *data = flash->mst->spi.data;
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	const struct bitbang_spi_master *master = data->master;
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	/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
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	 * Requesting and releasing the SPI bus is handled in here to allow the
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	 * programmer to use its own SPI engine for native accesses.
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	 */
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	bitbang_spi_request_bus(master, data->spi_data);
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	bitbang_spi_set_cs(master, 0, data->spi_data);
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	for (i = 0; i < writecnt; i++)
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		bitbang_spi_write_byte(master, writearr[i], data->spi_data);
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	for (i = 0; i < readcnt; i++)
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		readarr[i] = bitbang_spi_read_byte(master, data->spi_data);
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	bitbang_spi_set_sck(master, 0, data->spi_data);
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	default_delay(master->half_period);
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	bitbang_spi_set_cs(master, 1, data->spi_data);
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	default_delay(master->half_period);
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	/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
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	bitbang_spi_release_bus(master, data->spi_data);
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	return 0;
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}
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static int bitbang_spi_shutdown(void *data)
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{
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	/* FIXME: Run bitbang_spi_release_bus here or per command? */
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	free(data);
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	return 0;
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}
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static const struct spi_master spi_master_bitbang = {
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	.features	= SPI_MASTER_4BA,
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	.max_data_read	= MAX_DATA_READ_UNLIMITED,
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	.max_data_write	= MAX_DATA_WRITE_UNLIMITED,
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	.command	= bitbang_spi_send_command,
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	.read		= default_spi_read,
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	.write_256	= default_spi_write_256,
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	.shutdown	= bitbang_spi_shutdown,
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};
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int register_spi_bitbang_master(const struct bitbang_spi_master *master, void *spi_data)
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{
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	struct spi_master mst = spi_master_bitbang;
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	/* If someone forgot to initialize a bitbang function, we catch it here. */
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	if (!master || !master->set_cs ||
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	    !master->set_sck || !master->set_mosi || !master->get_miso ||
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	    (master->request_bus && !master->release_bus) ||
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	    (!master->request_bus && master->release_bus)) {
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		msg_perr("Incomplete SPI bitbang master setting!\n"
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			 "Please report a bug at flashrom@flashrom.org\n");
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		return ERROR_FLASHROM_BUG;
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	}
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	struct bitbang_spi_master_data *data = calloc(1, sizeof(*data));
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	if (!data)
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		return ERROR_FLASHROM_FATAL;
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	data->master = master;
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	if (spi_data)
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		data->spi_data = spi_data;
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	register_spi_master(&mst, data);
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	/* Only mess with the bus if we're sure nobody else uses it. */
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	bitbang_spi_request_bus(master, spi_data);
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	bitbang_spi_set_cs(master, 1, spi_data);
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	bitbang_spi_set_sck_set_mosi(master, 0, 0, spi_data);
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	/* FIXME: Release SPI bus here and request it again for each command or
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	 * don't release it now and only release it on programmer shutdown?
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	 */
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	bitbang_spi_release_bus(master, spi_data);
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	return 0;
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}
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