1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-08-15 11:30:18 +02:00

ichspi: Add support for Wildcat Lake

TEST=Flashrom is able to detect WCL SPI DID and show chipset name as
below:

> flashrom --flash-name
....
Found chipset "Intel Wildcat Lake".
....
> flashrom -p internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Found chipset "Intel Wildcat Lake".
Reading ich_descriptor... done.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS

Change-Id: Iaf1dc346b215c53cd2a0f6cf6e2cf4a8e6b5c19c
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Varun Upadhyay
2025-06-11 11:05:05 +05:30
committed by Anastasia Klimchuk
parent ff7091e9f4
commit 446af8ae1c
4 changed files with 28 additions and 3 deletions

View File

@@ -609,6 +609,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_ELKHART_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -719,6 +720,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
boot_straps = boot_straps_pch500;
break;
case CHIPSET_APOLLO_LAKE:
@@ -756,6 +758,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -1041,6 +1044,11 @@ static int enable_flash_ptl(const struct programmer_cfg *cfg, struct pci_dev *co
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_PANTHER_LAKE);
}
static int enable_flash_wcl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_WILDCAT_LAKE);
}
static int enable_flash_mcc(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE);
@@ -2222,6 +2230,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x7e23, B_S, DEP, "Intel", "Meteor Lake-P/M", enable_flash_mtl},
{0x8086, 0xe323, B_S, DEP, "Intel", "Panther Lake-U/H 12Xe", enable_flash_ptl},
{0x8086, 0xe423, B_S, DEP, "Intel", "Panther Lake-H 4Xe", enable_flash_ptl},
{0x8086, 0x4d23, B_S, DEP, "Intel", "Wildcat Lake", enable_flash_wcl},
#endif
{0},
};

View File

@@ -52,6 +52,7 @@ ssize_t ich_number_of_regions(const enum ich_chipset cs, const struct ich_desc_c
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_ELKHART_LAKE:
case CHIPSET_JASPER_LAKE:
return 16;
@@ -84,6 +85,7 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_c
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -126,7 +128,7 @@ void prettyprint_ich_chipset(enum ich_chipset cs)
"C620 series Lewisburg", "C740 series Emmitsburg", "300 series Cannon Point",
"400 series Comet Point", "500 series Tiger Point", "600 series Alder Point",
"Apollo Lake", "Gemini Lake", "Jasper Lake", "Elkhart Lake",
"Meteor Lake", "Panther Lake",
"Meteor Lake", "Panther Lake", "Wildcat Lake",
};
if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
cs = 0;
@@ -226,6 +228,7 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -327,6 +330,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
return freq_str[3][value];
case CHIPSET_ELKHART_LAKE:
return freq_str[4][value];
@@ -378,6 +382,7 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -521,6 +526,7 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i
cs == CHIPSET_C740_SERIES_EMMITSBURG ||
cs == CHIPSET_JASPER_LAKE ||
cs == CHIPSET_METEOR_LAKE ||
cs == CHIPSET_WILDCAT_LAKE ||
cs == CHIPSET_PANTHER_LAKE) {
const char *const master_names[] = {
"BIOS", "ME", "GbE", "DevE", "EC",
@@ -1124,6 +1130,7 @@ static enum ich_chipset guess_ich_chipset(const struct ich_desc_content *const c
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -1287,6 +1294,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -1335,6 +1343,7 @@ static uint32_t read_descriptor_reg(enum ich_chipset cs, uint8_t section, uint16
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:

View File

@@ -2110,6 +2110,7 @@ static void init_chipset_properties(struct swseq_data *swseq, struct hwseq_data
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
*num_pr = 6; /* Includes GPR0 */
*reg_pr0 = PCH100_REG_FPR0;
swseq->reg_ssfsc = PCH100_REG_SSFSC;
@@ -2152,6 +2153,7 @@ static void init_chipset_properties(struct swseq_data *swseq, struct hwseq_data
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
*num_freg = 16;
break;
default:
@@ -2216,6 +2218,7 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
tmp = mmio_readl(spibar + PCH100_REG_DLOCK);
msg_pdbg("0x0c: 0x%08"PRIx32" (DLOCK)\n", tmp);
prettyprint_pch100_reg_dlock(tmp);
@@ -2299,6 +2302,7 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
break;
default:
ichspi_bbar = mmio_readl(spibar + ICH9_REG_BBAR);
@@ -2340,6 +2344,7 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
break;
default:
tmp = mmio_readl(spibar + ICH9_REG_FPB);
@@ -2385,8 +2390,9 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
ich_gen == CHIPSET_JASPER_LAKE ||
ich_gen == CHIPSET_ELKHART_LAKE ||
ich_gen == CHIPSET_METEOR_LAKE ||
ich_gen == CHIPSET_PANTHER_LAKE)) {
msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Jasper/Elkhart/Meteor/Panther Lake.\n");
ich_gen == CHIPSET_PANTHER_LAKE ||
ich_gen == CHIPSET_WILDCAT_LAKE)) {
msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Jasper/Elkhart/Meteor/Panther Lake/Wildcat Lake.\n");
ich_spi_mode = ich_hwseq;
}

View File

@@ -360,6 +360,7 @@ enum ich_chipset {
/* All chipsets after METEOR_LAKE should support checking BIOS_BM to get read/write access to of FREG0~15 */
CHIPSET_METEOR_LAKE,
CHIPSET_PANTHER_LAKE,
CHIPSET_WILDCAT_LAKE,
};
/* ichspi.c */