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mirror of https://review.coreboot.org/flashrom.git synced 2025-08-15 19:40:19 +02:00

ichspi: Add support for Wildcat Lake

TEST=Flashrom is able to detect WCL SPI DID and show chipset name as
below:

> flashrom --flash-name
....
Found chipset "Intel Wildcat Lake".
....
> flashrom -p internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Found chipset "Intel Wildcat Lake".
Reading ich_descriptor... done.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS

Change-Id: Iaf1dc346b215c53cd2a0f6cf6e2cf4a8e6b5c19c
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Varun Upadhyay
2025-06-11 11:05:05 +05:30
committed by Anastasia Klimchuk
parent ff7091e9f4
commit 446af8ae1c
4 changed files with 28 additions and 3 deletions

View File

@@ -609,6 +609,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_ELKHART_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -719,6 +720,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
boot_straps = boot_straps_pch500;
break;
case CHIPSET_APOLLO_LAKE:
@@ -756,6 +758,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -1041,6 +1044,11 @@ static int enable_flash_ptl(const struct programmer_cfg *cfg, struct pci_dev *co
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_PANTHER_LAKE);
}
static int enable_flash_wcl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_WILDCAT_LAKE);
}
static int enable_flash_mcc(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE);
@@ -2222,6 +2230,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x7e23, B_S, DEP, "Intel", "Meteor Lake-P/M", enable_flash_mtl},
{0x8086, 0xe323, B_S, DEP, "Intel", "Panther Lake-U/H 12Xe", enable_flash_ptl},
{0x8086, 0xe423, B_S, DEP, "Intel", "Panther Lake-H 4Xe", enable_flash_ptl},
{0x8086, 0x4d23, B_S, DEP, "Intel", "Wildcat Lake", enable_flash_wcl},
#endif
{0},
};