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Code Issues Releases Wiki Activity

ichspi: Add support for Wildcat Lake

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TEST=Flashrom is able to detect WCL SPI DID and show chipset name as
below:

> flashrom --flash-name
....
Found chipset "Intel Wildcat Lake".
....
> flashrom -p internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Found chipset "Intel Wildcat Lake".
Reading ich_descriptor... done.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS

Change-Id: Iaf1dc346b215c53cd2a0f6cf6e2cf4a8e6b5c19c
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Varun Upadhyay
2025-06-11 11:05:05 +05:30
committed by Anastasia Klimchuk
parent ff7091e9f4
commit 446af8ae1c
4 changed files with 28 additions and 3 deletions
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10
ichspi.c
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@@ -2110,6 +2110,7 @@ static void init_chipset_properties(struct swseq_data *swseq, struct hwseq_data
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
*num_pr = 6; /* Includes GPR0 */
*reg_pr0 = PCH100_REG_FPR0;
swseq->reg_ssfsc = PCH100_REG_SSFSC;
@@ -2152,6 +2153,7 @@ static void init_chipset_properties(struct swseq_data *swseq, struct hwseq_data
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
*num_freg = 16;
break;
default:
@@ -2216,6 +2218,7 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
tmp = mmio_readl(spibar + PCH100_REG_DLOCK);
msg_pdbg("0x0c: 0x%08"PRIx32" (DLOCK)\n", tmp);
prettyprint_pch100_reg_dlock(tmp);
@@ -2299,6 +2302,7 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
break;
default:
ichspi_bbar = mmio_readl(spibar + ICH9_REG_BBAR);
@@ -2340,6 +2344,7 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
case CHIPSET_ELKHART_LAKE:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_WILDCAT_LAKE:
break;
default:
tmp = mmio_readl(spibar + ICH9_REG_FPB);
@@ -2385,8 +2390,9 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum
ich_gen == CHIPSET_JASPER_LAKE ||
ich_gen == CHIPSET_ELKHART_LAKE ||
ich_gen == CHIPSET_METEOR_LAKE ||
ich_gen == CHIPSET_PANTHER_LAKE)) {
msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Jasper/Elkhart/Meteor/Panther Lake.\n");
ich_gen == CHIPSET_PANTHER_LAKE ||
ich_gen == CHIPSET_WILDCAT_LAKE)) {
msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Jasper/Elkhart/Meteor/Panther Lake/Wildcat Lake.\n");
ich_spi_mode = ich_hwseq;
}