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flashchips: Add support for MXIC MX25L3273F
The MX25L3273F has been tested by ch341a programmer : read, write, erase and wp. We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature. MX25L3273F datasheet is available at the following URL: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8661/MX25L3273F,%203V,%2032Mb,%20v1.2.pdf Change-Id: I4adaaa796d1db34702e7b0ed8e6fb167a3a5f6d7 Signed-off-by: DanielZhang <danielzhang@mxic.com.cn> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81562 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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flashchips.c
45
flashchips.c
@ -9661,6 +9661,51 @@ const struct flashchip flashchips[] = {
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},
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.decode_range = DECODE_RANGE_SPI25_BIT_CMP,
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},
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{
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.vendor = "Macronix",
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.name = "MX25L3273F",
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.bustype = BUS_SPI,
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.manufacture_id = MACRONIX_ID,
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.model_id = MACRONIX_MX25L3205,
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.total_size = 4096,
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.page_size = 256,
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/* OTP: 512B total; enter 0xB1, exit 0xC1 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR,
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.tested = TEST_OK_PREWB,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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.eraseblocks = { {4 * 1024, 1024} },
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.block_erase = SPI_BLOCK_ERASE_20,
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}, {
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.eraseblocks = { {32 * 1024, 128} },
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.block_erase = SPI_BLOCK_ERASE_52,
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}, {
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.eraseblocks = { {64 * 1024, 64} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {4 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_60,
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}, {
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.eraseblocks = { {4 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
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.voltage = {2650, 3600},
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.reg_bits =
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{
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.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
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.tb = {CONFIG, 3, OTP}
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},
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.decode_range = DECODE_RANGE_SPI25,
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},
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{
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.vendor = "Macronix",
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