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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

flashchips: Add write protect function support for MX25R1635F

The MX25R1635F has been tested by ch341a programmer : read, write,
erase and wp.

We have tested --wp-enable, --wp-disable, --wp-list and --wp-range
commands for write-protect feature.

MX25R1635F datasheet is available at the following URL:
https://www.macronix.com/Lists/Datasheet/Attachments/8702/MX25R1635F,%20Wide%20Range,%2016Mb,%20v1.6.pdf

Change-Id: I6e2b417ab177039618069d8e35132ddbfb814f03
Signed-off-by: DanielZhang <danielzhang@mxic.com.cn>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/81840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
DanielZhang 2024-04-12 15:51:17 +08:00 committed by Anastasia Klimchuk
parent 6f47cc1737
commit be95e0be1f

View File

@ -10103,8 +10103,8 @@ const struct flashchip flashchips[] = {
.total_size = 2048,
.page_size = 256,
/* OTP: 1024B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_OK_PREW,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR,
.tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
@ -10131,6 +10131,14 @@ const struct flashchip flashchips[] = {
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
.voltage = {1650, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {CONFIG, 3, OTP}
},
.decode_range = DECODE_RANGE_SPI25,
},
{