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5 Commits

Author SHA1 Message Date
Edward O'Callaghan
dd1d07646f parade_lspcon.c: Clarify coincidentally JEDEC command usage
Clarify that SWSPI_WDATA_* coincidentally uses the same
commands as specified by JEDEC.

A similar data sheet does not really shed light if these
literally are raw JEDEC command values or 'virtual' ones.
As to avoid confusion, comment but perhaps not use the JEDEC
literals from spi.h until it is certain.

Change-Id: I851319ad4c36baad1e280309a6df8c86d6c4ad3d
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65557
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2022-08-02 02:18:00 +00:00
Edward O'Callaghan
f1ca19598c parade_lspcon.c: Leverage the BIT() macro
Change-Id: Iad51fb4b3440e281e842bcaecf0c060084681635
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2022-07-30 07:23:44 +00:00
Edward O'Callaghan
c59cf52e2a parade_lspcon.c: Add allow_brick=yes programmer param
Currently i2c programmers do not have a safe allow listing
mechanism via board_enable to facilitate fully qualified
chip detection.

Since i2c addresses alone can overlap a user may make the mistake
of using the wrong programmer. Although unlikely, it is within the
realm of possibility that a user could accidently somehow program
another chip on their board.

Change-Id: I819f9a5e0f3102bec8d01dd52a0025a0fbe46970
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
2022-07-30 07:22:55 +00:00
Edward O'Callaghan
b8c16e0429 parade_lspcon.c: Drop unused define
Change-Id: I35e800dec8295059d7cd0fa4503379e059993757
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65556
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
2022-07-30 07:20:36 +00:00
Thomas Heijligen
df0bbf07de Rename lspcon_i2c_spi to parade_lspcon
The chip targeted by the `lspcon_i2c_spi` programmer is a Parade PS175.
Rename the programmer to match the chips vendor / family instead of the
generic LSPCON protocol. Remove the `_i2c_spi` ending in preparation to
become an opaque master. The chip is visible on an Acer Chromebox CXI4.

https://www.paradetech.com/products/ps175/
https://www.acer.com/ac/en/US/content/series/acerchromeboxcxi4

TEST: `make CONFIG_PARADE_LSPCON=yes` and
      `meson build -Dconfig_parade_lspcon=true` produces flashrom
      binaries with the parade_lspcon programmer included.

Change-Id: I9148be6d9162c1722ff739929ca5e181b628dd57
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-07-17 22:43:56 +00:00