Report by Holger Mickler. Thanks!
Corresponding to flashrom svn r416 and coreboot v2 svn r3956.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Elan SC520 requries us to deal with flash chip base addresses at locations
other than top of 4GB. The logic for that was incorrectly triggered also when
a board had more than one flash chip. This patch will honor flashbase only when
probing for the first flash chip on the board, and look at top of 4GB for later
chips.
Corresponding to flashrom svn r415 and coreboot v2 svn r3932.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
Corresponding to flashrom svn r414 and coreboot v2 svn r3927.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: David Tiemann <davidtiemann@gmail.com>
It needs to have opcodes initialized same way as ICH7.
Corresponding to flashrom svn r413 and coreboot v2 svn r3926.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
Thanks Patrick!
Corresponding to flashrom svn r410 and coreboot v2 svn r3918.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
T/NT TEST_OK_ PROBE READ ERASE WRITE
Test report from Julia. Thanks!
Corresponding to flashrom svn r409 and coreboot v2 svn r3917.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Julia Longtin <juri@solarnetone.org>
SST AAI is Auto Address Increment writing, a streamed write to the flash chip
where the first write command sets a starting address and following commands
simply append data. Unfortunately not supported by Winbond SPI masters.
From July 2008.
Corresponding to flashrom svn r407 and coreboot v2 svn r3913.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Developed and tested to work on Intel D201GLY in July 2008.
Tested by a helpful person on IRC whose name I've since forgotten. Sorry!
Corresponding to flashrom svn r404 and coreboot v2 svn r3910.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
Through DirectIO from coresystems GmbH we now support Darwin/Mac OS X.
DirectIO is available at http://www.coresystems.de/en/directio
Corresponding to flashrom svn r399 and coreboot v2 svn r3905.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r397 and coreboot v2 svn r3903.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
The function exit()s on failure, and no callers check the return value.
Corresponding to flashrom svn r396 and coreboot v2 svn r3901.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r393 and coreboot v2 svn r3898.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
As reported by Jody McIntyre. Thanks!
Corresponding to flashrom svn r389 and coreboot v2 svn r3894.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Report by Jody McIntyre. Thanks!
Corresponding to flashrom svn r388 and coreboot v2 svn r3893.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Report by Scaldov M.V. Thanks!
Corresponding to flashrom svn r387 and coreboot v2 svn r3892.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r384 and coreboot v2 svn r3869.
Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: FENG yu ning <fengyuning1984@gmail.com>
Similarly to flashchips array, this patch intends to make the table board_pciid_enables more readable.
Corresponding to flashrom svn r382 and coreboot v2 svn r3861.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
> What real problem does this solve?
1. Next time someone adds a new struct member, we avoid mistakes of
ordering of initializers
2. we avoid mistakes in the first place.
The .x = y stuff was added for a (good) reason, I think this is an
improvement.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This board has 2x MX25L8005 flash chips behind an IT8718F LPC->SPI bridge.
The board uses GIGABYTE's patented BIOS failover technology, and at this point
we do not know how to control which of the two chips flashrom actually hits.
Corresponding to flashrom svn r380 and coreboot v2 svn r3859.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
Fix build error on distros with warn_unused_result attributes in glibc.
Corresponding to flashrom svn r378 and coreboot v2 svn r3857.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
AT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321 AT25DF321A AT25DF641
AT25F512B AT25FS010 AT25FS040 AT26DF081A AT26DF161 AT26DF161A AT26DF321
AT26F004
Straight from the data sheets, untested because I lack the hardware.
Corresponding to flashrom svn r376 and coreboot v2 svn r3853.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
- Remove the copyright listings and refer the reader to the source
files.
- Update the author list to those which have copyright messages in the
source files.
- Correct the license from GPL v2+ to (GPL v2, with some files under
later versions as well)
Corresponding to flashrom svn r375 and coreboot v2 svn r3852.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The explicit initialization makes sure any future struct flashchip
reordering is not needed. (Except for the case where we need arrays
of some of the struct members.)
Corresponding to flashrom svn r374 and coreboot v2 svn r3851.
Signed-off-by: Stephan Guilloux <mailto:stephan.guilloux@free.fr>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r373 and coreboot v2 svn r3850.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r372 and coreboot v2 svn r3849.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r371 and coreboot v2 svn r3848.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Fix that by throwing an error instead.
Corresponding to flashrom svn r370 and coreboot v2 svn r3834.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
There seem to be at least two versions of the board out there, and the
subsystem IDs changed between the versions.
Patch successfully tested on hardware.
Corresponding to flashrom svn r369 and coreboot v2 svn r3833.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
