The current auto detection is kind of broken. Since the NI-845X driver
package is likely not changing, hardcode `C:\Program Files
(x86)\National Instuments\NI-845x\MS Visual C` as default path to search
for the library and header. This can be overridden by setting
`CONFIG_NI845X_LIBRARY_PATH` to the custom path.
TEST=Run make HAS_LIB_NI845X=yes CONFIG_NI845X=yes successfully on MSYS2
MINGW32
Change-Id: I2115c30d0884e35eb549a31beef04d966ba4f491
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/75234
Reviewed-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com>
Currently, it's not possible to compile the upstream branch using the
`make' command without sphinx beeing installed.
Check if sphinx-build is installed and only then build or install the
man-page.
The problem was noticed from commit
f4f2f3dd19 move manpage to sphinx.
Change-Id: If1b81d9bc25ecac19d493b44b00a7c42d0643fe6
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/74519
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
To create a distribution package with meson you run
`meson dist -C <your_build_dir>`
This will collect all git tracked files and pack them into an archive.
There is no way to collect version information for that.
So now the base version stands in the VERSION file. To relase a flashrom
version you change that file and tag the changing commit.
When building from git the git version is embedded in the flashrom
binary. E.g.:
flashrom 1.4.0-devel (git:v1.2-1172-g7f186838) on Linux 6.1.3 (x86_64)
Change-Id: Idc17eadb397b3c579bddfbf9ae6bf1b171f5dfb7
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/72657
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This version was released in september 2005 and had a breaking api
change. Drop it so that we don't need to maintain the old codepath any
longer. Beside that, we have already a second codepath which is using
the new `pci_get_dev` variant exclusively.
Change-Id: If943db350b561a005d8292a53d9255223db3d571
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Use sphinx (sphinx-doc.org) to generate the UNIX man page from an
reStructuredText file instead of dealing with plain groff.
Use `meson setup -Dman-pages=enabled` to build the man page, and
`meson setup -Ddocumentation=enabled` to build the web documentation
explicitly. Both are enabled automatically if sphinx-build is found.
The man page will be installed as `<meson_mandir>/man8/flashrom.8` and
The html documentation in <meson_datadir>/doc/flashrom/html`.
The Makefile builds only the man-page format.
Increase the minimum version of meson from 0.53.0 to 0.57.0 to be
able to pass environment variables to the custom_target() command. That
is needed to pass the FLASHROM_VERSION to the documentation.
Change-Id: Iee9f1164c5913e47385e6f7d51dc7775a58b5a67
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/72619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Alexander Goncharov <chat@joursoir.net>
Add support for the WCH CH347, a high-speed USB to bus converter
supporting multiple protocols interfaces including SPI. Currently only
mode 1 (vendor defined communication interface) is supported, mode 2
(USB HID communication interface) support will be added later. The code
is currently hard coded to use CS1 and a SPI clock of 15 MHz, though
there are 2 CS lines and 6 other GPIO lines available, as well as a
configurable clock divisor for up to 60MHz operation. Support for these
will be exposed through programmer parameters in later commits.
This currently uses the synchronous libusb API. Performance seems to be
alright so far, if it becomes an issue I may switch to the asynchronous
API.
Tested with a MX25L1606E flash chip
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Change-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70573
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The ASMedia ASM106x series is a PCIe-SATA controller chip. It supports
an attached SPI flash chip that can contain configuration and PCI option
ROM. The interface is a simple shifter accessed via PCI config space,
up to 4 bytes at a time. Add a programmer driver for it.
Tested on a G536PCE1061V11 IO-PCE1061-V1.1 PCIe card, and
a MPCE2ST-A01 VER006S mini-PCIe card, both with chips marked ASM1061,
both enumerate as:
01:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02) (prog-if 01 [AHCI 1.0])
Subsystem: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:1060]
Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d
Signed-off-by: Alex Badea <vamposdecampos@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
1) Add function to flatten out the addresses of the flash chip as per
the different erase functions. This function will return a list of
layouts which is dynamically allocated. So after use all the layouts as
well as the list itself should be freed. The free_erase_layout function
does that.
2) Add function to align start and end address of the region (in struct
walk_info) to some erase sector boundaries and modify the region start
and end addresses to match nearest erase sector boundaries. This
function will be used in the new algorithm for erase function selection.
3) Add function that returns a list of sectors (as seen by the first
erase function) that need erasing.
4) Add a function to call the erase algorithm.
Change-Id: Ic57ca1cca3d1646543f6b5939ba9c35db8d08256
Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65844
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
While super i/o is related to the internal programmer it
isn't actually _the_ internal programmer. Move register
logic to its own object consistent with other programmer
types.
Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71577
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add a bash script for the flashrom CLI that auto-completes the command
sequence. The script is generated from a template by substituting a
list of enabled programmers. It requires an extra `bash-completion`
package to work, but, fortunately, it's installed on most systems.
Build system changes:
meson:
provide option `bash_completion` to determine if the script should
be installed (depends on option `classic_cli`).
makefile:
make a list of enabled programmers (by using CONFIG_* variables)
to do substitution manually
Change-Id: Ie68bc91c3cea4de2ffdbeffd07e48edd8d5590e1
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
These specific git hooks are only needed when someone wants to push a
patch to upstream and so it's not needed to run it in every make call.
Beside that, we also don't know the environment in which this is
executed and it might not be wanted.
Thus, add a new make target `gitconfig` and move the install command to
it. It can be used by running `make gitconfig`.
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Ib83568c7ff149a8ec34ad7e92720c36a89def7bd
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68647
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Add a new programmer driver for the DirtyJTAG project (a USB-JTAG
firmware for STM32 MCUs).
Successfully tested with DirtyJTAG 1.4 running on an Olimex STM32-H103
development board and a SST25VF020B SPI flash chip.
Change-Id: Ic43e9a014ed7d04e429e73b30c9dcfdde1a78913
Signed-off-by: Jean THOMAS <virgule@jeanthomas.me>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67878
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This is analogous to spi.c and opaque.c however parallel
logic was previously never consoldiated.
This free's up flashrom.c from namespace pollution.
BUG=b:242246291
TEST=builds with both make and meson.
Change-Id: Ie08e2e6c51ccef5281386bf7e3df439b91573974
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
This code was originally introduced by ITE for now exceedingly old
Chromebooks. The code has had very little attention to maintain it,
unlikely tested for a long time and now seems to be just a technical
burden to the flashrom project.
If someone is later interested it could be resurrected for reference
from git history. However, it needs quite a bit of work to bring it back
into maintainable order.
BUG=b:156143896,b:170689483
TEST=tree builds under meson+make and unit tests pass.
Change-Id: I5e8cafd73db837941c518f0e2d72d8192274fd79
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65378
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
STANDALONE mode was used to build flashrom without having support for
file handling. This was relevant to build libflashrom on top of
libpayload. For a while now, the code which is covered by STANDALONE has
moved to cli_*.c and is not used for libflashrom. Therefore we can drop
STANDALONE mode.
Change-Id: I58fb82270a9884a323d9850176708d230fdc5165
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Add functions like
`uint32_t read_le32(const void *base, size_t offset);`
Read a 32 bit unsigned from a base with an offset.
Having prototypes and a macro generated implementation makes it easier
to read, understand and spot errors in one of them.
Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/31016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Split the code for endian conversion into separate files for big and
little endian. The buildsystem selects the correct file for the used
endianness. Replace the swab macros with `static inline` c functions.
Define macros for returning the same or swapped value. Call those macros
in the endian specific files.
Change-Id: I86d38d816b37c283279c485fac8027f8fb94364a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Allow chips to specify functions that map status register bits to
protection ranges. These are used to enumerate available ranges and
determine the protection state of chips. The patch also adds a range
decoding function for the example chips. Many other chips can also be
handled by it, though some will require different functions (e.g.
MX25L6406 and related chips).
Another approach that has been tried in cros flashrom is maintaining
tables of range data, but it quickly becomes error prone and hard to
validate.
Using a function to interpret the ranges allows compact encoding with
most chips and is flexible enough to allow chips with less predictable
ranges to be handled as well.
BUG=b:195381327,b:153800563
BRANCH=none
TEST=dumped range tables, checked against datasheets
Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
The internal programmer has platform independent code for x86 and linux
based code for mipsel. Furthermore the internal programmer can call the
linux mtd programmer when available.
Enable the internal programmer on x86 or linux.
Change-Id: Ia607ea60c3d7d15fe231fa412595992dadc535ad
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The --static flag of pkg-config returns also the LDFLAGS which are
required to link the library static. Use this flag to successfully
link against static libraries when the shared variant is not available.
This is the case in OpenBSD with libpci.
Change-Id: I6029a096c1ceca625789d18c88119d912d79bc0e
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
