Thanks to "Putlinuxonit" <putlinuxonit@gmail.com> for reporting
and testing.
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004309.html
Corresponding to flashrom svn r1131.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Tested on Asus P4S800-MX.
Corresponding to flashrom svn r1128.
Signed-off-by: David Borg <borg.db@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Various whitespace- and cosmetic fixes. Also, Use %04x:%04x for printing
the USB IDs (which are 4 hex digits long), not %02x:%02x.
Corresponding to flashrom svn r1123.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The AAI code rewrite in r1052 introduced a bug: The writelen of AAI
continuation is 3 bytes, but the code incorrectly had 6 bytes there.
This causes all AAI writes (except the first two bytes of a chip) to
fail. Thanks to den_m for reporting the bug and for testing the fix.
Corresponding to flashrom svn r1121.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
If we violate the raw SPI communication protocol requirements of the Bus
Pirate (namely, waiting for the completion of one command before sending
the next one), we can reduce the number of round trips by a factor of 3.
The FT2232 chip present in the Bus Pirate has a big enough buffer (at
least 128 bytes IIRC) to avoid overflows in the tiny buffer of the Bus
Pirate PIC.
Thanks to Daniel Flinkmann for sponsoring development of this patch.
Corresponding to flashrom svn r1120.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Daniel Flinkmann <DFlinkmann@gmx.de>
Acked-by: Daniel Flinkmann <dflinkmann@gmx.de>
Add support for the Amontec JTAGkey2, see
http://www.amontec.com/jtagkey2.shtmlhttp://www.amontec.com/jtagkey.shtml.
This FTDI 2232H variant has an additional output enable, which will be
set to its "on" (L) when CS is pulled low. But it lacks a power supply
and you need an external 3.3V source.
The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It
should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I
only have a JTAGkey2 here for testing.
Add all FT2232H/FT4232H based programmers to the list printed with
flashrom -L
Corresponding to flashrom svn r1119.
Signed-off-by: Jörg Fischer <turboj@gmx.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Allow compilation on all architectures even if direct hardware access
primitives are missing, if all you need is userspace access to the
serial port (serprog, buspirate) or no access at all (dummy).
Corresponding to flashrom svn r1116.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Add support for Atmel AT25DF081A and AT25DQ161.
Some chips require EWSR before WRSR, others require WREN before WRSR,
and some support both variants. Add feature_bits to select the correct
SPI command, and default to EWSR.
Corresponding to flashrom svn r1115.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Steven Rosario
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Fix alphabetic sort order for manufacturers in flashchips.c.
Rename a few EON chips to Eon.
Corresponding to flashrom svn r1114.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Huge thanks go to Michael Karcher for reverse engineering the interface
and to Johannes Sjölund for testing the first iterations of my patch on
his hardware until it worked.
Thanks to the following testers of the patch:
* MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland
* MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy
* MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz
* MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers
* MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose
* MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan
* MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt
* MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson"
flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x
SPI is detected.
Corresponding to flashrom svn r1113.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Corresponding to flashrom svn r1112.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Convert all PCI-based external programmers to use special little-endian
accessors for all MMIO regions of PCI devices. This patch does _not_
touch the internal programmer (which is PCI-based as well).
Huge thanks go to Misha Manulis who worked with me to create a first
version of this patch for the satasii programmer based on modification
of generic code.
Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_
prefix for the abstraction layer.
NOTE to package maintainers: With this patch, compilation and usage of
flashrom should be safe on x86, x86_64, MIPS (little and big endian) and
PowerPC (big endian).
The internal programmer is disabled on non-x86/x86_64 (but it
compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi
can not be compiled on non-x86/x86_64 because port space I/O is
not (yet) supported. Please compile with default settings on
x86/x86_64 and with the following settings on all other architectures:
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no
CONFIG_RAYER_SPI=no
Corresponding to flashrom svn r1111.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
This allows USB-based external programmers to be used by non-root users
(which are in the 'plugdev' group). The file is to be installed by the
distros into the proper place (not sure if this is distro-specific). On
Debian the file will end up in /etc/udev/rules.d/z60_flashrom.rules.
On some systems the 'plugdev' group might have to adapted to whatever
the respective distro uses.
The following devices are listed so far:
- Amontec JTAGkey(2)
- Buspirate
- Dediprog SF100
- DLP Design DLP-USB1232H
- FTDI FT4232H Mini-Module
Corresponding to flashrom svn r1110.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
To be safe, the onboard video of the nView edition of this board has
been included in the match. If other NF-M2 editions have the same board
enable, the match should be broadened
lspci/superiotool
http://www.coreboot.org/pipermail/flashrom/2010-April/002909.html
No success report, thus committed as untested.
Corresponding to flashrom svn r1109.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The SATA controller matched in the board enable is not always present
with that ID (that's the 2-port ICH9 SATA IDE controller), but (depending
on board revision/edition or BIOS settings an ICH9 SATA RAID controller
appears instead. This patches matches on the SMBus function in the
south bridge instead of the SATA controller.
Non-working board reported by: Gunter Keilholz <gunter.keilholz@googlemail.com>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-June/003591.html
Corresponding to flashrom svn r1108.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Non-working board reported by idlogin / Putlinuxonit <putlinuxonit@gmail.com>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-May/003330.html
No success report, so committed as untested.
Corresponding to flashrom svn r1106.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Non-working board reported by: Anders Jenbo <anders@jenbo.dk>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-June/003346.html
no success report, so committed as untested.
Corresponding to flashrom svn r1105.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
No response from reporter - committed as "untested".
Corresponding to flashrom svn r1101.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Smarter version could decide whether SPI is vital or not depending on
straps. Straps are currently implemented for ICH7. EP80579 is in the comment,
PCH of 5 Series/3400 Series has "LPC, reserved, PCI, SPI".
Corresponding to flashrom svn r1098.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
http://www.amictechnology.com/pdf/A25L20P.pdf covers:
AMIC A25L05PT
AMIC A25L05PU
AMIC A25L10PT
AMIC A25L10PU
AMIC A25L20PT
AMIC A25L20PU
http://www.amictechnology.com/pdf/A25L16P.pdf covers:
AMIC A25L16PT
AMIC A25L16PU
Clarify the situation surrounding the A25L40PT and A25L40PU chips which
share the same RDID values, despite the fact that their erase block
layouts are different. Rudolf Marek tested and confirmed the distinct
erase block layouts of these chips.
Add a pretty-printer for the AMIC SPI chip status register
Add a generic AMIC chip type.
Corresponding to flashrom svn r1096.
Signed-off-by: Daniel Lenski <dlenski@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Change the nicnatsemi address mask to use MA0-MA16 and set the maximum
decode size to 128KB.
Corresponding to flashrom svn r1095.
Signed-off-by: Andrew Morgan <ziltro@ziltro.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
To use the RayeR driver, run
flashrom -p rayer_spi -V
Known bugs/limitations:
- Won't compile/work on non-x86 architectures.
- Will always use direct port I/O access.
Log follows:
flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC
4.3.2, little endian
Calibrating delay loop... OK.
Initializing rayer_bitbang_spi programmer
Using port 0x378 as I/O base for parallel port access.
...
Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1
0xc2, id2 0x2015
...
Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address
0xffe00000.
...
No operations were specified.
Corresponding to flashrom svn r1093.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Martin Rehak <rayer@seznam.cz>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Fix a bug where 4 GB of spaces would be printed per line if a vendor
name was longer than 10 chars.
This patch is needed to commit MoselVitelic chip support.
Corresponding to flashrom svn r1090.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Use the BAR value returned by pcidev_init which automatically applies
the correct BAR mask for the drkaiser driver. Truncate flash chip
addresses to fit into the 128 kB memory window for drkaiser and pick the
same window size for gfxnvidia.
Uwe tested all operations successfully on a Dr. Kaiser card.
Corresponding to flashrom svn r1089.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Needed on the original Xbox running Xebian and a few other ancient
systems.
Corresponding to flashrom svn r1088.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Alec Wright <alecjw@member.fsf.org>
Newer llvm/clang versions (since r102686) have a __clang_version__ macro
which can be used to print the exact clang version.
Fix a case where chip_to_probe was referenced twice via extern, once at
the function level and once in a global include file. Found by latest
clang.
Corresponding to flashrom svn r1087.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This chip is used on some Xbox versions.
Corresponding to flashrom svn r1086.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Alec Wright <alecjw@member.fsf.org>
Change the SPI bitbanging core to fix a subtle bug (which had no
effect so far) and to make integration of the RayeR SPIPGM and Nvidia
MCP6x/MCP7x SPI patches easier. Kill a few global variables and require
explicit initialization of bitbanging delay.
A big to Johannes Sjölund for testing an earlier version of the code as
part of the Nvidia MCP6x/MCP7x SPI bitbanging patch.
Corresponding to flashrom svn r1085.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This removes the need of allocating an extra buffer, but also removes
the possibility of having the data read back during the initial write
phase for debugging purposes.
Compile tested, no functional testing.
Corresponding to flashrom svn r1084.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Use full-chip write function on Fujitsu MBM29F400TC and ST M29F400BT.
Add support for ST M29F400BB.
Corresponding to flashrom svn r1083.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Actually check if the unlock worked instead of just assuming it worked.
Corresponding to flashrom svn r1082.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
