Move all define statements in its own file to tidy up the main
Makefile.
Change-Id: I451f2eeab2773982e02b2f2fdc9e8abe1cc87630
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Handle system specific code in an own file like i2c_helper_linux.c.
The build system decides when to build it.
Change-Id: I0744e769dcc6000483e7256105903a87e927ee77
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The PROGRAMFILES(X86) envvar contains brackets which
could not be interpreted by the Makefile's interpreter.
A sed based tweak have been added to extract the variable
value from the env command output. The prefixed include
and linker path with this (now correctly extracted) prefix
only added to the compilation flags if it differ from the
PROGRAMFILES variable.
Change-Id: I397619a5038567d649a417ce6b9d8ac9e1c8c67b
Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Also one case that doesn't work on Android.
Change-Id: I17381172f8df213bbddccedec2ef288326e49ecf
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55877
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
`mark_unsupported` disables all programmers passed as arguments and
adds them to the UNSUPPORTED_FEATURES list. It's conveniently used
with our dependency lists, e.g.
$(call mark_unsupported,$(NEEDS_LIBUSB1) $(NEEDS_LIBFTDI))
Change-Id: I6c9b66dfa89ec3d71675576d03fcebfdea30ce7b
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
For each feature or library that we treat as dependency, list which
programmers depend on it.
Change-Id: I6929181f18213e1434cbbc7ba2d2b0b04bd46a6a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55872
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This reverts commit cf1e8f7b904ddf639b29b2e1bb0ad681c1aad76d.
It's an indirect, spurious dependency. Why clutter the build system
with it? Instead, the functions these programmers actually depend
on should be factored into a compilation unit that doesn't need PCI.
No matter this change, compilation with `CONFIG_INTERNAL=no` is
broken because of these programmers right now.
Change-Id: I134eb7d74b44f92dfdea3c764f39bc3673739fa0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
CONFIG_DEFAULT_PROGRAMER_NAME replaces CONFIG_DEFAULT_PROGRAMMER.
It uses the name of the programmer for identification.
make CONFIG_DEFAULT_PROGRAMER_NAME=dummy and
meson -Ddefault_programmer_name=dummy will extend to
CONFIG_DEFAULT_PROGRAMER_NAME=&programmer_dummy in the code.
Change-Id: I976447787c6f6bfbdc0145d80d61e1ddcf97ac33
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The I2C support code they use is Linux-specific.
Change-Id: I04d25ff8f8c3097428ac8695669b1757c38f49e9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/53999
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This reverts commit 5e5c3f15efe262ff23642dd543faf6a9dbb3bbdb.
Reason for revert: Breaks building on PowerPC, NetBSD, DJGPP, and it is
possible that SPARC fails to build as well.
Change-Id: I57b5125207de3fd156dface67cba605da893d6aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52425
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The Raiden debug external spi programmer need only depend
on libusb and is unrelated to libpci. Correct meson and gnu make
builds where meson had configuration in the incorrect section
and gnu make artifactually disabled the build on Windows/MinGW
which doesn't have libpci.
BUG=none
TEST=still continues to build.
Change-Id: I2d6a8c33a2228abf006a9b278bcb7133765c7074
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This matches the build flags that are correctly explicitly defined in
meson.build where-as the Makefile is randomly picking up whatever the
system toolchain happens to default to.
Fix dmi.c while we are here to avoid a re-define of _GNU_SOURCE.
BUG=none
TEST=`make` with both gcc and clang.
Change-Id: I4f973927fc018510a3beaa6c4fa2f356c77c7a6e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/47908
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Allows to force-disable the use of clock_gettime() at build time,
falling back to busy-looping for udelay. This is useful when building
for systems which are known to lie about the resolution of
clock_gettime(), such as Linux guests running under the Muen Separation
Kernel.
Change-Id: I645a5d3f29ffdbd24a58127ab73d7d8755304f45
Signed-off-by: Martin Lucina <martin@lucina.net>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48796
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This adds support for Spansion 25Fxxxxx chips. These chips
require their own probing logic because the first 6 bytes
returned by RDID must be examined to identify the chip.
New erase functions are required as the chips support multiple
sector layouts, and the default layout must be changed to be
able to erase the entire flash.
Adapted from cros flashrom at
`9c4c9a56b6a0370b383df9c75d71b3bd469e672d`.
BUG=b:153800073
TEST=builds
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Change-Id: I2d23f9c36ce8b2959807fbeee7f60e02444e3763
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Unfortantly raiden_debug was upstreamed with a misnaming
of the CONFIG_ make param that introduces unnecessary divergence.
Rename to 'CONFIG_RAIDEN_DEBUG_SPI' as-is downstream.
Change-Id: I07c03647c329286bb223e4dae4665704e508db2c
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48105
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Both requires PCI port I/O and hence works only on x86.
TEST=builds on Ubuntu for Raspberry Pi
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I69e1fbd87819b0b6370f31e9ee4c474500fb3759
Reviewed-on: https://review.coreboot.org/c/flashrom/+/47394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
LSPCON and MST do not depend on libusb.
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Change-Id: If6db3a318aca349fc1ccd343d3d6d47b809eac8e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Both depend on functions from chipset_enable.c and board_enable.c, which
require libpci.
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I9505d7f18f4781a264e29e9667b717c061ba33b8
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46812
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Both use INB/OUTB and hence should be marked as NEED_RAW_ACCESS in the
makefile.
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I6fafd9f59d06f60e9491e3e059c1205d48d8232e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46811
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The following just lays out the structure for write protect
manipulation of SPI flash chips in Flashrom. We later follow
up with adding support for each manufacturer group.
BUG=b:153800563
BRANCH=none
TEST=builds
Change-Id: Id93b5a1cb2da476fa8a7dde41d7b963024117474
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40325
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The parsing of the output of archtest.c produced an unexpected
value on AArch64 NixOS. For example, the make variable ARCH was set to:
```
bit outside of fd_set selected
arm
```
This made the arch and OS checks fail.
This commit simplifies the parsing, making it more robust.
The C files archtest.c, endiantest.c and os.h used to set the
TARGET_OS, ARCH and ENDIAN variables, respectively, output
the result of the test as the final line, so just extracting
the final line and removing double quoting is enough.
This commit also fixes a bug with debug_shell lacking escaping
single quotes, which prevented using the single quote in the
debug_shell calls. It used to work by accident before this fix;
the line in the call happened to contain a balanced pair of double
quotes and lacked other characters that needed escaping, which
didn't break the debug_shell, but this was accidental and very
brittle.
Signed-off-by: Pyry Kontio <pyry.kontio@drasa.eu>
Change-Id: Iaa4477a71e758cf9ecad2c22f3b77bc6508a3510
Reviewed-on: https://review.coreboot.org/c/flashrom/+/43140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Since lspcon talks over i2c I doubt libusb is a build
requirement, remove it.
Change-Id: Ic4d71c10d2d8c0c881aa5732daed35c20d905a5e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/41020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
This adds support for the Parade lspcon usb-c to HDMI protocol
translater part that is i2c-controlled. The support allows the
host to reach the SPI ROM that hangs off the part where it
stores its firmware.
Usage is as follows:
flashrom -p lspcon_i2c_spi:bus=X
where X is the bus number.
BUG=b:148746232
BRANCH=none
TEST=tested with following commands, read/write/erase works good.
flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo;
flashrom -p lspcon_i2c_spi:bus=7 -E;
flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo;
Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
See https://www.kernel.org/doc/Documentation/i2c/ for details.
This creates common interface for I2C access functions, and adds
implementation for linux I2C functions.
BUG=b:148746232
BRANCH=none
TEST=build success
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Change-Id: Ie0487824dfb71970bede17f617dbbb30ddf78c12
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39686
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Turns out CONFIG_RAIDEN was missing in the LIBUSB1
as no overrides. Credit to HAOUAS Elyes for spotting this.
Change-Id: I7dd26665a0133175949c11717837e9de68a1bf71
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
These are helpful usb device accessors and helpers that
are later used for the so-called Raiden debugger programmer.
BUG=b:143389556
BRANCH=none
TEST=builds
Change-Id: Ic928220fc919fe4958c8150e61e11470dac88f13
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38936
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Enable all -Wextra warnings but -Wunused-parameter. Nobody seems to
miss warnings about unused parameters and we have a lot unavoidable
occurrences in flashrom because of common interfaces.
Change-Id: Id2ece264c2d483e34019985dd3a7631c4889abe6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/30411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Automotive 2 Mbit (256KiB) serial SPI bus EEPROM
PREW tested successfully with use of ch341a programmer
on Linux host 5.2.0-1-MANJARO x86_64
Signed-off-by: Konstantin Grudnev <grudnevkv@gmail.com>
Change-Id: Ic29cd9051c7eac4822d620c299834134f987f01b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
