This allows spi masters to register shutdown function in spi_master
struct, which means there is no need to call register_shutdown in init
function, since this call is now a part of register_spi_master.
As a consequence of using new API, two things are happening here:
1) No resource leakage anymore in case register_shutdown() would fail,
2) Fixed propagation of register_spi_master() return values.
Basic testing: when I comment out free(data) in linux_spi_shutdown, test
fails with error
../linux_spi.c:235: note: block 0x55a4db276510 allocated here
ERROR: linux_spi_init_and_shutdown_test_success leaked 1 block(s)
Means, shutdown function is invoked.
BUG=b:185191942
TEST= 1) builds and ninja test including CB:56911
2) On ARMv7 device
flashrom -p linux_spi -V
-> using linux_spi, chip found
3) On x86_64 AMD device
flashrom -p internal -V
-> this is actually using sb600spi, chip found
Change-Id: Ib60300f9ddb295a255d5ef3f8da0e07064207140
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This adds to the search-by-serial functionality with
search-by-description (product string). This is useful when e.g. one has
multiple FTDIs in a system and wants the serial numbers to reflect the
system-level serial number, and the description to reflect the
subcomponent names.
Tested manually by running with both serial and description searches, on
a machine with multiple FTDIs plugged in. Ensured that when two devices
with the same vid/pid/serial number are plugged in, description can
be used to differentiate.
Verifed no-description, no-serial, one FTDI plugged in base case works.
Original version of this code used the original single "arg" char*, but
on further thought, this wasn't worth the readability and functionality
losses. The new version with arg2 gets rid of several lines of code, the
gotos, and adds the ability to filter by both description and serial
simultaneously.
Change-Id: Ib4be23247995710900175f5f16e38db577ef08fa
Signed-off-by: Harry Johnson <johnsonh@waymo.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56164
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reword the message and drop the error string from libftdi. It is
already printed in send_buf().
Change-Id: I125ae9ec0d5487fc26d588a7fd6c54da4ebd0d70
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
We missed to `free(spi_data)` on one path. It also seems odd to leak
the return code of a locally used library into our common infrastruc-
ture, so normalize all error paths to return 1.
Change-Id: I5158d06127a9a8934b083e48b69d29c4d5a11831
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55696
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
The meaning of the variables is easy to misunderstand as some
states are merely implicit: All output pins that are not set
in the `cs_bits` mask will be constantly driven low. This may
be sheer coincidence as all programmers that need additional
pins driven use active-low signals to enable buffers.
While other pins stay low, *all* pins set in the `cs_bits`
mask are supposed to be toggled during SPI transactions.
Also drop some irritating dead code and try to explain things
in a comment.
Change-Id: I2b84ede01759c80f69d5ad17e43783d09ecd1107
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This reverts commit ba6575de82f091b97ea0f2efcf2f79ef3739d64f.
Technically, the only thing that is wrong here is the lack of docu-
mentation (manpage update). However, as this change was succeeded by
a regressing fixup patch, it seems likely that the meaning of the
`csgpiol` parameter was just misunderstood and these changes were
not what the author intended.
Change-Id: I460237b9d275b1cd1d8a069f852d17dea393b14e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This reverts commit a43e44b6abbe8381be3f3dd20a430973cf8b8ab5.
Nothing was broken. So this breaks everything. Well, actually only
the `csgpiol` parameter. But that is very obvious.
`csgpiol` was added to use a GPIO pin as /CS. But this change impli-
citly hardcoded /CS to ADBUS3.
Change-Id: I9ecdfe227585dda74658c16c96a57dd42d1d78b4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This reverts commit 3207844ec0b5dc16f9ae9ee45294213dbf6d060b.
It used the `cs_bits` variable for its own purpose (not CS) which
was only possible because the `cs_bits` semantics were broken earlier.
It also lacks an update to the manpage.
Change-Id: I4a95317b1cf1fc6df9471d0cfb8a6a8f40964fe3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This reverts commit 180079632b15758ca0bbbe5782611bd4573e11d8.
The renaming only seemed to match the code because of earlier introduced
regressions (see following reverts). For proper support of the `gpiol`
feature, we'd likely need both a `cs_bits` and a `pinlvl` variable.
Change-Id: Ifa5b2259ccf49ddf729d01176bacd94a95c39925
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55691
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Now that ft2232_spi_send_multicommand() is implemented, we don't need
the single-command version anymore.
Change-Id: I2e7fa1046e260f490b881a33e02ad73d16f0a30c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This "chunk size" limits the amount of data that is passed to libusb
at once. If we had exceeded the chunk size, libftdi would have split
the data into individual, synchronous bulk transfers. But the chunk
size was actually chosen to avoid this. So without any known effect,
setting the chunk size is useless. Drop it.
Change-Id: I779e24dc3f3379a98ddce02c3765062ac3241884
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Every ftdi_write_data() call is quite time consuming as the ftdi-chips
seems to take always 2-3ms to respond. This leads to what the comment
already says: Minimize USB transfers by packing as many commands as
possible together. So I packed the WREN command together with the
following operation which can be program or erase operation.
This saves about 1 minute when programming a 128MBit Flash within a
virtualized setup.
Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de>
Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Pass pointers to dynamically allocated data to register_spi_master().
This way we can avoid some mutable globals.
Change-Id: Id7821f1db3284b7b5b3d0abfd878b979c53870a1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
It was impossible to register a const struct spi_master that would
point to dynamically allocated `data`. Fix that so that we won't
have to create more mutable globals.
Change-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Move global singleton states into a struct and store within
the spi_master data field for the life-time of the driver.
This is one of the steps on the way to move spi_master data
memory management behind the initialisation API, for more
context see other patches under the same topic "register_master_api".
TEST=builds
BUG=b:140394053
Change-Id: I67518a58b4f35e0edaf06ac09c9374bdf06db0df
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reorder functions to avoid forward-declarations. It looks like
for most of the spi masters this has already been done before, I
covered remaining small ones in one patch.
BUG=b:140394053
TEST=builds
Change-Id: I23ff6b79d794876f73b327f18784ca7c04c32c84
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/50711
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Renames the variable cs_bits to pinlvl, to more accurately reflect its
role. pinlvl works in conjunction with pindir to specify GPIO pin state.
Signed-off-by: Alan Green <avg@google.com>
Change-Id: I53d1ccae8fa870f037b03762bec79fee1b7bad21
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49780
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Adds a new arg "gpiol" to allow the four FT2232 GPIOL pins to be set to
any combination of high, low or high-impedance.
The existing arg "csgpiol", is intended to function as an additional
"cs" signal, allowing pins to be set high but not low. This patch
preserves the csgpiol arg for backward compatibility. In the event that
both arguments are specified, gpiol is used.
Signed-off-by: Alan Green <avg@google.com>
Change-Id: I1f2b3b968577e62e3c5b11bcdf4afe2de6eb84ab
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49637
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reset FTDI I/O pins to high-Z (input) when shutting down. This allows
other devices to use the SPI bus without having to disconnect the
programmer.
This change will introduce a backward incompatibility in the case where
a user is relying on the state of FTDI outputs post-programming (eg. to
disallow another device from driving CS low).
However, there are likely more cases where releasing the SPI bus is the
correct thing to do.
Signed-off-by: Alan Green <avg@google.com>
Change-Id: I9fae55e532595752983f55fac2298f81699dbe5b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49632
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The ChromiumOS flashrom fork has since const'ify flashctx
in a few places. This aligns the function signatures to
match with downstream to ease forward porting patches
out of downstream back into mainline flashrom.
This patch is minimum viable alignment and so feedback is
welcome.
Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
If `buf` became NULL because of an error, subsequent calls to the
`ft2232_spi_send_command` function with a smaller buffer size will
result in a null pointer dereference. Add an additional null check
before using `buf` to prevent that. Moreover, use `size_t` for the
`bufsize` and `oldbufsize` variables, as it's what `realloc` uses.
Change-Id: Idc4237ddca94c42ce2a930e6d00fd2d14e4f125c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39975
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This only sets 3rd CS# bit be asserted during read/write operations.
Tested and confirmed working on 4232H & PicoTap ft2232 programmers
against MX25R6435F & S25FL128S chips.
Signed-off-by: Samir Ibradzic <sibradzic@gmail.com>
Change-Id: Ia0ac14b9a52f251306887500dae3e57d73322157
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This allows multiple 'csgpiol' bits to be set to active state at the
same time. Previously, only one GPIOL could be activated. I have an
use-case such that FT4232H is wired to two different SPI chips, and in
order to select one of them two GPIOLs have to be set.
Now, one can enable any particular GPIOL, for example:
csgpiol=01
would activate GPIOL0 and GPIOL1 at the same time.
The change is backward-compatible with previous csgpiol formatting.
Signed-off-by: Samir Ibradzic <sibradzic@gmail.com>
Change-Id: I645ddaa9852e9995bd2a6764862fda2b2ef0c26b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The Tin Can Tools Flyswatter and Flyswatter 2 have a FT2232H
with a JTAG interface wired to port A. The buffers that drive the
JTAG pins need to be enabled with an nOE signal from the
FT2232H ADBUS6 and ADBUS7 pins.
Flyswatter has an ARM-14 JTAG interface and Flyswatter 2 has
an ARM-20 JTAG interface.
Change-Id: I56b1fb76dcda32bb02980cd54a2853506bfc9dfd
Signed-off-by: Russ Dill <Russ.Dill@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/36896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Not needed anymore. Drop it fast before it encourages anyone to
violate layers again!
Change-Id: I8eda93b429e3ebaef79e22aba76be62987e496f4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33651
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Add a feature flag SPI_MASTER_4BA to `struct spi_master` that advertises
programmer-side support for 4-byte addresses in generic commands (and
read/write commands if the master uses the default implementations). Set
it for all masters that handle commands address-agnostic.
Don't prefer native 4BA instructions if the master doesn't support them.
Change-Id: Ife66e3fc49b9716f9c99cad957095b528135ec2c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This patch has been cherry-picked from various patches in the chromiumos
tree denoted below.
Change-Id: I4b679e23ab37a4357b1e3d23f6f65a1c31f7d71a
Change-Id: Ibda56201ab4519315431c08206c61ceffb7c7e65
Change-Id: I540ad2d304dc69a7c79ca154beb744ef947ff808
Servo V2 has two FT4232H parts. The first one (denoted 'legacy') is
dedicated to supporting orginal Servo V1 functionality. The second,
residing at USB ID 0x18d1:5003 provides two other SPI interfaces on
port A and B respectively.
Additional changes by Alexandru Gagniuc, Hatim Kanchwala and Urja Rannikko:
- The clock divisor is set to '6', as this creates a 10MHz SPI clock,
which is the same SPI clock that the chromiumos branch produced.
- Add udev rule for Google servo boards to util/flashrom.rules.
- Add Google servo entry to manpage.
Corresponding to flashrom svn r1925.
Signed-off-by: Todd Broch <tbroch@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested mainboards:
OK:
- Elitegroup GF7050VT-M
Reported by Alex
- Fujitsu D2724-A1x (used in ESPRIMO E5625)
Reported by Rainer Spillmann
- Teclast X98 Air 3G
Reported by Antonio Ospite
Flash chips:
- Fix MX25L6405(D) definition by splitting it.
Reported by Reggie McMurtrey
- Add Macronix MX25L..08E family and rearrange MX25L6436E.
- Pm49FL004 to PREW (+EW)
Reported by Georg Sauthoff
Miscellaneous:
- Add board enable for abit KN9 Ultra.
- Mark ARM-USB-OCD as working OK.
- Use "mobile devices" instead of "laptops" in output.
- Tiny other stuff.
Corresponding to flashrom svn r1886.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
In r1872 we replaced some magic values with constant macros from
ftdi.h. Among them was DIS_DIV_5 that represents the opcode that
disables the use of the 5x prescaler on newer devices. Unfortunately
this macro was only introduced with support for FT232H and hence is
not available in older versions of the library. Revert back to using
the magic constant.
Corresponding to flashrom svn r1873.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested mainboards:
OK:
- ASUS F2A85-M
Reported by various corebooters
- ASUS M2N-MX SE Plus
Reported by Antonio
- ASUS P5LD2
Reported by François Revol
- Lenovo ThinkPad T530
Reported and partially authored by Edward O'Callaghan
- MSI MS-7502 (Medion MD8833)
Reported by naq on IRC
- Shuttle AB61
Reported by olofolleola4
- ZOTAC IONITX-F-E
Reported by Bernardo Kuri
Flash chips:
- Atmel AT45DB021D to PREW (+PREW)
Reported by The Raven
- Atmel AT25F4096 to PREW (+PREW)
Reported by 공준혁
- GigaDevice GD25Q16(B) to PREW (+PREW)
Reported by luxflow@live.com using a GD25Q16BSIG
- Catalyst CAT28F512
Mark erase and write as known bad (not implemented)
Miscellaneous:
- Various spelling corrections by Daniele Forsi.
- Added and refined a bunch of chips originally investigated by Carl-Daniel.
- Marked the ARM-USB-OCD-H programmer as tested
(reported by Ruud Schramp).
- Tiny other stuff.
Corresponding to flashrom svn r1839.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.
Corresponding to flashrom svn r1831.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested mainboards:
OK:
- abit BX6 2.0
Reported by Stefan Tauner
- Acer EM61SM/EM61PM (used in Acer Aspire T180)
Reported by Benjamin Bellec
- ADLINK Express-HR
Reported by Obermair Thomas
- ASUS M3N-H/HDMI
Reported by Franc Serres
- Attro G5G100-P
Reported by Christoph Grenz
- ASRock 960GM-GS3 FX
Reported by Fuley Istvan
- Elitegroup P6BAP-A+ (V2.2)
Reported by Arnaldo Pirrone
- Elitegroup GeForce7050M-M (V2.0)
Reported by Leif Middelschulte
- Fujitsu D3041-A1 (used in ESPRIMO P2560)
Reported by Daggi Duck
- GIGABYTE GA-8S648
Reported by TeslaBIOS
- GIGABYTE GA-970A-D3P (rev. 1.0)
Reported by Jean-Francois Pirus
- GIGABYTE GA-B85M-D3H
Reported by Mladen Milinković
- GIGABYTE GA-X79-UD3
Reported by Jeff O'Neil
- GIGABYTE GA-X79-UP4 (rev. 1.0)
Reported by George Spelvin
- GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3)
Reported by Vangelis Skarmoutsos
- GIGABYTE GA-Z87-HD3
Reported by virii5
- Lenovo Tilapia CRB
Reported by jenkins56 on IRC
- MSI GT60-2OD (notebook, only with layout patches)
Reported by Vasiliy Vylegzhanin
- MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid)
Reported by professorll
- MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640)
Reported by Koen Rousseau
- MSI MS-7125 (K8N Neo4(-F/FI/FX))
We had a board enable for that one for years, but it was not (and still is not)
completely clear which boards are covered.
- MSI MS-7522 (MSI X58 Pro-E)
Reported by Gianluigi Tiesi
- PCWARE APM80-D3
Reported by César Augusto Jakoby
- Pegatron IPP7A-CP
Reported by Илья Шипко
- Supermicro H8QME-2
Reported by Greg Tippitt
- Supermicro X7SPA-H
Reported by Kyle Bentley
- Supermicro X7SPE-HF-D525
Reported by Micah Anderson
- Supermicro X8DTE
Reported by Mark Nipper
- Supermicro X8SIL-F
Reported by Peter Samuelson
- ZOTAC IONITX-A (-E) version
Reported by Maciej Wroniecki
NOT OK:
- Supermicro X10SLM-F
Reported by Micah Anderson
Flash chips:
- Atmel AT29C020 to PREW (+PREW)
It was marked like that in the past, but I could not find the reason why the
test bits were reset. Urja Rannikko tested it again and it still works.
- Eon EN25F10 to PREW (+PREW)
Reported by Stolmár Tamás
- Eon EN25QH64 to PR (+PR)
Reported by Vladimir 'φ-coder' Serbinenko
- GigaDevice GD25Q32(B) to PREW (+PREW)
Reported by mrnuke
- Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW)
Reported by Jamie Nichol
- Macronix MX25L2005(C) to PREW (+PREW)
Reported by Давыдов Дмитрий
- Micron/Numonyx/ST N25Q064..1E to PREW (+PREW)
Reported by Paolo Zambotti
- Pmc Pm25LD010(C) to PREW (+PREW)
Reported by Vasile Ceteras
- Micron/Numonyx/ST M25P16 to PREW (+EW)
Reported by raven
- Micron/Numonyx/ST M25PX64 to PREW (+W)
Reported by Zaolin
- SST SST25VF020B to PREW (+PREW)
Reported by Michaël Zweers
- SST SST49LF040 to PREW (+W)
Reported by Oskar Enoksson
- Add support for MX25L3273E (evil twin of MX25L3205 et al.)
Also, add MX25L1673 and MX25L6473E to the names of their twins and
add a note about MX25L8073E.
- Winbond W25X32 to PREW (+REW)
Reported by The Raven
- Winbond W29C010 etc. to PREW (+W)
Reported by san
Chipsets tested OK:
- Intel NM70 (8086:1e5f)
Reported by mrnuke
- Intel C204 (8086:1c54)
Reported by Vasiliy Vylegzhanin
- Intel QM67 (8086:1c4f)
Reported by Obermair Thomas
- Intel HM77 (8086:1e57)
Reported by Vasiliy Vylegzhanin
- Intel B85 (8086:8c50)
Reported by Mladen Milinković
- Intel HM87 (8086:8c4b)
Reported by Vasiliy Vylegzhanin
- Intel Z87 (8086:8c44)
Reported by virii5
- NVIDIA MCP51 (10de:0261)
Reported by Marcin Kościelnicki
- SiS 648 (1039:0648)
Reported by TeslaBIOS
Miscellaneous:
- Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_).
- getrevision.sh: Ignore failing date calls.
- getrevision.sh: Fix -u and -l for older git versions which require = for the
git log grep parameter.
- Corrected K8T Neo2-F entries due to a report from Stelios Tsampas.
- Add "-p internal" to output that requests users to send flashrom -V logs.
- Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist.
- Tiny other stuff.
Corresponding to flashrom svn r1783.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Once upon a time usbdev_status was created for the ft2232
programmer. Its IDs are semantically different to pcidev_status
because they indicate USB instead of PCI IDs, but apart from that
both data structures are equal. This change makes life easier for
everything involved in handling and printing the status of devices
that is noted in those structures by combining them into dev_entry.
It is still possible to distinguish between PCI and USB devices
indirectly by using the struct programmer's type field.
Also, add a programmer column to the PCI and USB devices lists.
Corresponding to flashrom svn r1632.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
To be able to get rid of lots of #ifdefs and centralize programmer-specific
data more...
- introduce two new fields to struct programmer_entry, namely
enum type (OTHER, USB, PCI) and union devs (pcidev_status, usbdev_status
or char *note).
- use those fields to generate device listings in print.c and print_wiki.c.
Bonus: add printing of USB devices to print_wiki.c and count supported PCI
and USB devices.
Corresponding to flashrom svn r1631.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested Mainboards:
OK:
- Foxconn P55MX
http://www.flashrom.org/pipermail/flashrom/2012-October/010002.html
Tested flash chips:
- Eon EN25F64 to PR (+PR)
http://paste.flashrom.org/view.php?id=1426
- Macronix MX25L1005 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-October/010004.html
- Set SST39VF512 to PREW (+W)
http://www.flashrom.org/pipermail/flashrom/2012-September/009958.html
Tested chipsets:
- Z77 (only reading was really tested)
Miscellaneous:
- Fix ft2232_spi's parameter parsing.
- Fix nicrealtek's init (always segfaulted since r1586 oops).
- Add another T60 variant to the laptop whitelist.
- Improve message shown when image file size does not match flash chip
- Refine messages regarding the flash descriptor override strap according
to the findings by Vladislav Bykov on his P55MX.
- Fix the ID of EN25F64.
- Demote and clarify debug message in serprog_delay().
- Minor other cleanups.
Corresponding to flashrom svn r1613.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
- Use libftdi's error string to add more detail.
- Add full stops to messages.
- Minor white space fixes.
Corresponding to flashrom svn r1610.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
For older versions of libftdi we define TYPE_232H ourselves and this
seems to be enough to get at least basic support (and we don't need
more than that AFAICT).
Corresponding to flashrom svn r1609.
Signed-off-by: Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Add a check to validate the selected channel/interface, which not even
libftdi seems to do yet.
This patch changes default behavior: the new default channel/interface is A.
Also, this patch uses the word 'channel' in addition or in place of 'interface'
where possible without too much hassle because it is the term FTDI uses.
Corresponding to flashrom svn r1608.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This patch just fixes a limited number of bits not conforming to c99 by using
- __asm__ instead of just asm
- {0} instead of {} for struct initialization
- h_addr_list[0] instead of h_addr to access the host address in
struct hostent
- #include <strings.h> where needed (for ffs and strcasecmp)
Based on a previous patch by Carl-Daniel.
Corresponding to flashrom svn r1585.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Else libftdi complains that it is impossible to set interface on an already
open device since 1c5fa36b67bc30742eee94ed3e3648fcd4640f24
(which will probably end up in libftdi 0.21).
Corresponding to flashrom svn r1573.
Signed-off-by: Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
