Flashrom currently only supports exactly one Super I/O or Embedded
Controller, and this means quite a few notebooks and a small subset of
desktop/server boards cannot be handled reliably and easily.
Allow detection and initialization of up to 3 Super I/O and/or EC chips.
WARNING! If a Super I/O or EC responds on multiple ports (0x2e and
0x4e), the code will do the wrong thing (namely, initialize the hardware
twice). I have no idea if we should handle such situations, and whether
we should ignore the second chip with identical ID or not. Initializing
the hardware twice for the IT87* family is _not_ a problem, but I don't
know how well IT85* can handle it (and whether IT85* would listen at
more than one port anyway).
Corresponding to flashrom svn r1289.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI.
Test report (success) is here: http://paste.flashrom.org/view.php?id=379
Thanks to David Hendricks for testing on a Google Cr-48 laptop with
ITE IT85* EC SPI. Test report (success) is here:
http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html
Acked-by: David Hendricks <dhendrix@google.com>
Only list the memory controller PCI IDs because the only other subsystem
mentioned is used by network and sound interfaces both of which can be
turned off in BIOS.
Tested on a board rev 1.85.
Corresponding to flashrom svn r1273.
Signed-off-by: Diego Elio Pettenò <flameeyes@gmail.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Gigabyte is not really helpful with their PCI IDs for us, the subsystem
IDs used just mean "gigabyte northbridge" and "gigabyte southbridge".
We should investigate whether autodetection of this board is causing
interference with other boards.
real version 2: Extend list of PCI IDs for nvidia southbridges.
flashrom -V: http://paste.flashrom.org/view.php?id=326
lspic: http://paste.flashrom.org/view.php?id=328
superiotool: http://paste.flashrom.org/view.php?id=329
Corresponding to flashrom svn r1266.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This patch fixes wrong escaping of %.
In print.c %%2b is correct instead of \%2b ("%%2b"=%2b=+)
In board_enable.c %d is correct instead of \%d.
Corresponding to flashrom svn r1256.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
I found this via educated guessing and trial-and-error.
Corresponding to flashrom svn r1239.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Details, lspci/superiotool/flashrom logs:
http://www.flashrom.org/pipermail/flashrom/2010-October/005160.html
Also add the vendor website URL for this board.
Corresponding to flashrom svn r1214.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
A lot of messages sent@flashrom.org just have "flashrom -V" as the subject.
Ask people to include more information in the subject line to make life
easier for developers/supporters.
Corresponding to flashrom svn r1202.
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This also adds (and marks as tested) a chipset-enable for the SiS 741.
All operations successfully tested on hardware.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004710.html
Corresponding to flashrom svn r1192.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Reported by Konstantin <hc@comp.susu.ac.ru>
lspci (superiotool missing, doesn't matter for this patch)
http://www.coreboot.org/pipermail/flashrom/2010-September/004609.html
DMI is needed, as there are no usefull PCI IDs.
(no test of that board yet, thus marked as untested)
Corresponding to flashrom svn r1187.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The board-enable is the same as for the ASUS A7V8X, i.e., it raises
GP51 on the ITE IT8703F. I verified using a multimeter that this
will raise both, WE# and TBL# on the flash chip.
All operations successfully tested on hardware.
Also renamed board_asus_a7v8x() to it8703f_gpio51_raise().
Corresponding to flashrom svn r1167.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joshua Roys <roysjosh@gmail.com>
Corresponding to flashrom svn r1163.
Signed-off-by: Tim ter Laak <timl@scintilla.utwente.nl>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F,
while keeping bit 3 of register 0x23 set while manipulating the first
register.
AFAIK, there is no public datasheet available for this super i/o chip, but
the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem
to have the same meaning as on the ITE IT8710F.
Matching on NB/SB.
Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write
all work.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html
flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html
Many thanks to Reinder de Haan for help with reverse engineering this!
Corresponding to flashrom svn r1161.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Matching on NB/SB. Probe, read, erase and write all work.
lspci/superiotool output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004461.html
I believe that this board enable also works for MSI BX Master (MS-6163
rev:3) and perhaps also for MSI MS-6163FC (MS-6163 rev:1) but these
boards have not been tested.
Test logs for MS-6163 (rev:2):
http://www.flashrom.org/pipermail/flashrom/2010-September/004704.html
Corresponding to flashrom svn r1160.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Match on SMBus and Audio.
lspci/superiotool/flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-September/004689.html
Corresponding to flashrom svn r1159.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Tested-by: Alexander Mikhnovets <alexander.mikhnovets@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read,
erase and write all work.
Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset
as tested.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004705.html
Corresponding to flashrom svn r1158.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004436.html
This goes the safe route of adding a match for the P4P800 that does not
match the P4P800-E Deluxe which is already in. It seems quite likely that
the whole P4P800 family could use the same board enable with one generic
board enable match, though.
This match uses host bridge + audio, because all other IDs match the
P4P800-E Deluxe board, as reported in
http://www.e-monkeys.de/Everest-Bericht.txt
(no user feedback, commit as "untested")
Corresponding to flashrom svn r1157.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004539.html
matching SMBus + Audio, because SMBus is the only core device with
usable IDs.
Corresponding to flashrom svn r1156.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Marked as untested for now, as there was no response from the user.
Corresponding to flashrom svn r1155.
Signed-off-by: Sergey A Lichack <shadowpilot34@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Many thanks to Michael Karcher for reverse engineering this.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004475.html
Corresponding to flashrom svn r1146.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This patch changes the intel_piix4_gpo_set() function to always check
the GENCFG and XBCS registers for the availability of the
requested GPO line before raising/lowering it and fails otherwise. It
makes no attempt to bypass the values in these configuration
registers.
The old flashrom code did consider it safe to reprogram (multiplexed)
GPO:s 22-26 without checking the value of the controlling register
(GENCFG). I do not really know why.
I have tested this patch on an Asus P2B-N (needs GPO18 low) and MSI
MS-6163 Pro (needs GPO14 high).
The information for these registers are from the Intel "82371AB
PCI-TO-ISA / IDE XCELERATOR (PIIX4)" datasheet available here:
http://www.intel.com/design/intarch/datashts/29056201.pdf
Corresponding to flashrom svn r1142.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
- There are number of boards that have board-enables in board-enable.c but
have no corresponding entry in print.c (with or without URL doesn't matter)
and thus appear neither in the "flashrom -L" list of boards nor in the
wiki output. Fix this by adding entries for them in print.c.
- abit AN-M2
- abit KN8 Ultra
- ASUS A8Jm (laptop)
- ASUS A8N (might need changing to "A8N-SLI Deluxe", see
http://www.coreboot.org/pipermail/flashrom/2009-November/000878.html)
- ASUS A8N-LA (Nagami-GL8E)
- ASUS P4B533-E
- ASUS P4S800-MX
- HP ProLiant DL165 G6
- IBASE MB899
- Intel SE440BX-2 (marked as non-working for now though, due to
http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html)
- MSI MS-6577 (Xenon)
- MSI MS-7207 (K8NGM2-L)
- Fix / amend a few board names:
- Add "ProLiant" name to the "DL145 G3" (and the new "DL165 G6"), we
use such "series" names for various other boards (e.g. "Vectra" etc)
and it also helps users googling for those names.
- HP "Vectra VL400 PC" should be "Vectra VL400" really, I'm pretty sure
the "PC" is not part of the board name but simply stands for
"personal computer". Same for "Vectra VL420 SFF PC".
- Change "ASUS A8JM" to "ASUS A8Jm" as per vendor website.
- Add comments for boards which may be listed with incorrect names,
I sent out clarification requests to the list, URLs listed as comment.
- Add "Xenon" HP name to the "MSI MS-6577" OEM board.
- Fix typo in "MS-7207 (K8N GM2-L)", should be "MS-7207 (K8NGM2-L)" as
per vendor website.
Corresponding to flashrom svn r1141.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Change the DMI string to only match this exact board (DMI "NAGAMI2L")
as only this one is tested.
Similar HP OEM boards might also work using this board-enable but that's
not sure and not tested. Two of those boards have DMI strings "NAGAMI"
and "NAGAMI2".
Corresponding to flashrom svn r1140.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004414.html
(URL added by Michael Karcher)
Corresponding to flashrom svn r1139.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
I had to use the USB controller in the board enable because all other
subsystem IDs are having vendor: Gigabyte but mostly copy the Intel
product IDs.
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004420.html
Corresponding to flashrom svn r1138.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Thomas Kalka <thomas.kalka@googlemail.com>
- Fix incorrect whitespace, indentation, and coding style in some places.
- Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use
it, the comments are useless as we don't have any Doxygen markup in there.
- Use consistent vendor name spelling as per current website (NVIDIA,
abit, GIGABYTE).
- Use consistent / common format for "Suited for:" lines in board_enable.c.
- Add some missing 'void's in functions taking no arguments.
- Add missing fullstops in sentences, remove them from non-sentences (lists).
Corresponding to flashrom svn r1134.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This was successfully tested by 'kai2343' on IRC.
Thanks to Michael Karcher for finding the board enable.
Corresponding to flashrom svn r1133.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Thanks to "Putlinuxonit" <putlinuxonit@gmail.com> for reporting
and testing.
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004309.html
Corresponding to flashrom svn r1131.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Corresponding to flashrom svn r1112.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
To be safe, the onboard video of the nView edition of this board has
been included in the match. If other NF-M2 editions have the same board
enable, the match should be broadened
lspci/superiotool
http://www.coreboot.org/pipermail/flashrom/2010-April/002909.html
No success report, thus committed as untested.
Corresponding to flashrom svn r1109.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The SATA controller matched in the board enable is not always present
with that ID (that's the 2-port ICH9 SATA IDE controller), but (depending
on board revision/edition or BIOS settings an ICH9 SATA RAID controller
appears instead. This patches matches on the SMBus function in the
south bridge instead of the SATA controller.
Non-working board reported by: Gunter Keilholz <gunter.keilholz@googlemail.com>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-June/003591.html
Corresponding to flashrom svn r1108.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Non-working board reported by idlogin / Putlinuxonit <putlinuxonit@gmail.com>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-May/003330.html
No success report, so committed as untested.
Corresponding to flashrom svn r1106.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Non-working board reported by: Anders Jenbo <anders@jenbo.dk>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-June/003346.html
no success report, so committed as untested.
Corresponding to flashrom svn r1105.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
No response from reporter - committed as "untested".
Corresponding to flashrom svn r1101.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Needed on the original Xbox running Xebian and a few other ancient
systems.
Corresponding to flashrom svn r1088.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Alec Wright <alecjw@member.fsf.org>
