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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 23:43:42 +02:00

3032 Commits

Author SHA1 Message Date
Christian Ruppert
db9d9f4d0a Improve makefile structure a bit
Corresponding to flashrom svn r508.

Signed-off-by: Christian Ruppert <spooky85@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-14 14:17:07 +00:00
Carl-Daniel Hailfinger
bfe2e0cf67 Add a dummy SPI controller driver, similar to the dummy LPC/FWH/Parallel flasher driver
Does not support reading or writing the fake chip yet.

flashrom --programmer dummy
also enables the dummy SPI controller driver.

Testing the dummy SPI driver revealed a RDID debug printing bug in the
SPI core. Fix that as well.

Corresponding to flashrom svn r507.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-14 12:59:36 +00:00
Daniel McLellan
d02b73f9e9 Fix spelling error in comment
Author: raijin

Corresponding to flashrom svn r506.

Signed-off-by: Daniel McLellan <daniel.mclellan@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-14 12:41:00 +00:00
Carl-Daniel Hailfinger
5100a8a9ae Generic status register prettyprinting for SST25*
Even if we don't tell the user about the areas the block locking bits
correspond to, printing a detailed list of which lock bits are set is a
definite improvement.

Corresponding to flashrom svn r505.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Sample output:
[...]
Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a.
probe_spi_rdid_generic: id1 0xbf, id2 0x254a
Chip status register is 1c
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not
set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is set
Chip status register: Bit 3 / Block Protect 1 (BP1) is set
Chip status register: Bit 2 / Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000.

Acked-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>
2009-05-13 22:51:27 +00:00
Carl-Daniel Hailfinger
93bb375356 SST25 chips do not support page program, only byte program
Downgrade the chips from 256-byte writes to 1-byte writes. This fixes
writing to them on ICH/VIA SPI masters.

Corresponding to flashrom svn r504.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
2009-05-13 22:19:12 +00:00
Mateusz Murawski
c4a61d678d Winbond W39V040A TEST_OK_ PROBE READ
Thanks to Mateusz for testing and reporting!

Corresponding to flashrom svn r503.

Signed-off-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-13 22:18:35 +00:00
Mateusz Murawski
e34538142a Mark SST 39VF512 as fully tested
Tested with 3COM 3C905C: EtherLink 10/100 PCI (TX)
http://www.coreboot.org/pipermail/coreboot/2009-May/048163.html

Corresponding to flashrom svn r502.

Signed-off-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-13 15:57:38 +00:00
Uwe Hermann
92c53eef8e Fix nic3com.c build issues on *BSD
Corresponding to flashrom svn r501.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-13 12:01:57 +00:00
Carl-Daniel Hailfinger
3e9dbea1ce There are various reasons why a SPI command can fail
Among others, I have seen the following problems: - The SPI opcode is
not supported by the controller. ICH-style controllers exhibit this if
SPI config is locked down. - The address in in a prohibited area. This
can happen on ICH for any access (BBAR) and for writes in chipset write
protected areas. - There is no SPI controller.

Introduce separate error codes for unsupported opcode and prohibited
address.

Add the ability to adjust REMS and RES addresses to the minium supported
read address with the help of spi_get_valid_read_addr(). That function
needs to call SPI controller specific functions like reading BBAR on
ICH.

Corresponding to flashrom svn r500.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-13 11:40:08 +00:00
Uwe Hermann
b4dcb7188f Add support for 3COM NICs as "external programmer" and Atmel AT49BV512
This allows flashrom to identify, read, write, erase and verify flash chips
on (some) 3COM network cards. The patch uses the external programmer
infrastructure, the network card is basically treated as an external
flash programmer.

Usage:

$ ./flashrom -p nic3com
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
No operations were specified.

$ ./flashrom -p nic3com -E
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Erasing flash chip... SUCCESS.

$ ./flashrom -p nic3com -wv backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 1023 at address: 0x0000ffc0
Verifying flash... VERIFIED.

$ ./flashrom -p nic3com -r backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Reading flash... done.

I have tested this on actual hardware (see PCI IDs above) and all
operations worked fine.

Support for other 3COM cards will follow (I added some more which should
be supportable by this code, but they're untested so far), as well as
support for NICs from other vendors.

The patch also adds support for the Atmel AT49BV512 which is soldered
onto the 3COM NIC I used for testing.

Corresponding to flashrom svn r499.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-13 11:36:06 +00:00
Carl-Daniel Hailfinger
01624f40ee Use helper functions chip_{read,write}[bwl] to access flash chips
The semantic patch I used in r418 to make the original conversion to
accessor functions was missing one isomorphism:
a[b] <=> *(a+b)

The semantic patcher Coccinelle was used to create this patch. Semantic
patch follows:
@@
typedef uint8_t;
expression a;
volatile uint8_t *b;
@@
- b[a]
+ *(b + a)
@@
expression a;
volatile uint8_t *b;
@@
- *(b) = (a);
+ chip_writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ chip_readb(b)
@@
type T;
T b;
@@
(
 chip_readb
|
 chip_writeb
)
 (...,
- (T)
- (b)
+ b
 )

Corresponding to flashrom svn r498.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-12 15:38:55 +00:00
Uwe Hermann
24f9fbe075 Unify write_39sf020() and write_49f002() functions
The write_39sf020() and write_49f002() functions are identical except
for whitespace differences, so drop one of them.

Corresponding to flashrom svn r497.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-12 14:06:04 +00:00
Carl-Daniel Hailfinger
d13775eae1 Rename the STM50FLW register variable flash_addr used for block write protect handling
All other chips call it wrprotect which is less confusing. As a side
benefit, flash_addr is now a name usable for other stuff.

Corresponding to flashrom svn r496.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
2009-05-11 20:04:30 +00:00
Carl-Daniel Hailfinger
1e334e619b Print dummy programmer messages only if verbose mode is selected
Print the return value of dummy_chip_read[bwl].
Align entries in programmer_table.

This is a cosmetic patch and has no effect on code flow.

Corresponding to flashrom svn r495.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
2009-05-11 15:46:43 +00:00
Carl-Daniel Hailfinger
8130f2d3ec Check probing results for flash contents
When flashrom JEDEC code sends the ID command to the chip, it expects to
see IDs in the default flash location.

However, sometimes the chip does not react to the ID command, either
because it doesn't understand the command or because the command never
reached it. One way to detect this is to compare ID output with flash
chip contents for the same location. If they are identical, there is a
high chance you're not actually seeing ID output. Warn the user in that
case.

This patch helps a lot when a chip is not recognized and we want to
check if the probe responses are real IDs or just random flash chip
contents.

This should probably be added to all probe functions, but probe_jedec
is called for all sizes and thus flashrom will check this condition at
least once per size, making sure we can cross-match the warning.

Corresponding to flashrom svn r494.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
2009-05-11 14:40:31 +00:00
Carl-Daniel Hailfinger
1455b2baea Abstract mapping/unmapping of flash regions
Flash mapping/unmapping was performed without an abstraction layer,
so even the dummy flasher caused memory mappings to be set up. Add
map/unmap functions to the external flasher abstraction.

Fix a possible scribble-over-low-memory corner case which fortunately
never triggered so far.

With this patch, --programmer dummy works fine as non-root.

Corresponding to flashrom svn r493.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-11 14:13:25 +00:00
Carl-Daniel Hailfinger
d0fc9469fd Handle (un)locking of SST FWH chips
Add lock bit handling (printing, setting and checking) to SST FWH chips
and abort any writes to locked sectors. Verbose mode gives you all the
info. Normal mode only tells you of unlocking failed, but gives enough
details to debug.

Add a comment about flash register placement to flashrom.c.

Thanks to Uwe for testing multiple iterations of this patch.

Corresponding to flashrom svn r492.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-11 14:01:17 +00:00
Carl-Daniel Hailfinger
dbfa02911f Create a SB600 SPI detection heuristic
I know that the data sheets say we can't read the ROM straps, but
creative interpretation of the data sheets yielded a heuristic which
should work pretty well.

NOTE: If you test this, make sure you power down and _unplug_ the
machine for a few minutes before you boot and run flashrom with this
patch.
If the machine is not unplugged for some time, the test will yield
incorrect results.
If you run a slightly older flashrom version than svn HEAD, the test
will yield incorrect results.
If you run any flashrom version (except svn HEAD plus this patch) after
poweron, the test will yield incorrect results.

Explanation:
Older flashrom versions unconditionally write to registers which are
used for this heuristic. These registers are in the S5 power domain, so
even powering down does not clear them, you really have to unplug the
machine and remove the battery if this is a laptop.

Corresponding to flashrom svn r491.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
2009-05-10 14:11:07 +00:00
Luc Verhaegen
add6d9b5a6 Add support for EPoX EP-8K5A2 and separate out common VT823x board enable code
Corresponding to flashrom svn r490.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-09 14:26:04 +00:00
Carl-Daniel Hailfinger
8b4f8e0453 Kill one superfluous variable and improve code readability
Corresponding to flashrom svn r489.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 07:32:30 +00:00
Carl-Daniel Hailfinger
97d6b09209 Fix Elan SC520 handling
Flashbase is a variable which should never be set outside chipset code.
It is only used to calculate the base address of the flash space at
exactly one location in the code.

Setting flashbase during probe caused subsequent probes to fail unless
special handling code was used. We had such code and it caused every
probe except the first to fail on Elan SC520.

Remove the superfluous flashbase assignment and simplify the rest of the
code.

Corresponding to flashrom svn r488.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
2009-05-09 07:27:23 +00:00
Carl-Daniel Hailfinger
4c24ad4bdf Trim default ICH SPI delay from 1000 to 10 microseconds
Since many commands take around 10 microseconds to complete, it is
totally pointless to wait for 1000 microseconds before checking the
status again.

This patch is tested and reduced write time on ICH7 with SST25VF080B
from over one hour to 62 seconds.

Thanks to Ali Nadalizadeh for testing!

Corresponding to flashrom svn r487.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
2009-05-09 07:24:23 +00:00
Carl-Daniel Hailfinger
8d49701bcb Convert all flashchips.c entries with SPI programing to the 256-byte version by default
Change the flashchips entry for SST SST25VF080B to 1-byte writing.

Tested-by: Ali Nadalizadeh.

Corresponding to flashrom svn r486.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 02:34:18 +00:00
Carl-Daniel Hailfinger
96930c3952 Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode
Change SPI architecture to handle 1-byte chunk chip writing differently
from 256-byte chunk chip writing.

Annotate SPI chip write functions with _256 or _1 suffix denoting the
number of bytes they write at maximum.

The 1-byte chunk writing is cut-n-pasted to different SPI drivers right
now. A later patch can move them to the generic spi_chip_write_1.

Corresponding to flashrom svn r485.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 02:30:21 +00:00
Carl-Daniel Hailfinger
03adbe1269 Refine handling of spi_write_enable() failures to fix chip erases on ichspi
Until the ICH SPI driver can handle preopcodes as standalone opcodes,
we should handle such special opcode failure gracefully on ICH and
compatible chipsets.

This fixes chip erase on almost all ICH+VIA SPI masters.

Thanks to Ali Nadalizadeh for helping track down this bug!

Corresponding to flashrom svn r484.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 02:09:45 +00:00
Carl-Daniel Hailfinger
c312920864 Add a dummy external flasher which just prints each operation
Usage:
flashrom --programmer dummy

This is a great way to test flashrom without root access.

Corresponding to flashrom svn r483.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-09 00:54:55 +00:00
Uwe Hermann
a93045cb17 board_enable: split vendor name and board name into two fields
This will allow generation of supported boards for wiki output to be
split to distinct columns.

Corresponding to flashrom svn r482.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 00:47:04 +00:00
Carl-Daniel Hailfinger
ce9867780a Add --programmer to help text and man page
Corresponding to flashrom svn r481.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-09 00:27:07 +00:00
Uwe Hermann
4179d29207 Make chipset list alphabetically ordered as the other lists
Corresponding to flashrom svn r477.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-08 17:50:51 +00:00
Carl-Daniel Hailfinger
702218d030 Add external flasher support
- Read/write accesses through function pointers
- Command line parameter for internal/external flasher
- Board and chipset setup moved to internal init function
- Shutdown stuff moved to internal shutdown function

As a side benefit, this will allow us to undo chipset write enable
during shutdown.

Tested by Uwe on real hardware.

Corresponding to flashrom svn r476.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-08 17:43:22 +00:00
Carl-Daniel Hailfinger
f160a12938 Re-add a line which got deleted in r473 by accident
Corresponding to flashrom svn r475.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-08 17:15:15 +00:00
Uwe Hermann
deeebe2df1 Keep list of boards alphabetically sorted
This is (among other things) useful/required for the -L output and the
upcoming wiki-syntax output of supported boards.

Corresponding to flashrom svn r474.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-08 16:23:34 +00:00
Carl-Daniel Hailfinger
03b4e71cb9 Don't assume flash is accessible via MMIO for chips with no read function
Flashrom assumes that the flash chip contents are available via mmap if
no read function is defined.

This special case is handled in lots of places all over the code.

Remove the special case and use the read_memmapped function. Not only
does this allow us to fix a read bug in flashrom I recently uncovered on
ICH SPI, it also allows us to add support for Paraflasher to flashrom.

Corresponding to flashrom svn r473.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-08 12:49:03 +00:00
Uwe Hermann
b003991173 Store and display chipset test status (not only chip status)
The list of tested chipsets is synced from the wiki.

Also, split the chipset vendor and name into two fields for easier
wiki-syntax output later.

Corresponding to flashrom svn r472.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-07 13:24:49 +00:00
Carl-Daniel Hailfinger
259fa01d43 Always print the flashrom version as first output line
Suggested by Peter Stuge.

Corresponding to flashrom svn r471.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-07 00:59:53 +00:00
Carl-Daniel Hailfinger
cbdd4f0fc9 Document uncertainty regarding ASD chips
ASD chips may exist, but all available docs suggest they are just
rebranded Winbond chips with Winbond IDs. The ASD vendor/chip IDs in
flash.h are very likely just misinterpreted LHA headers.

Corresponding to flashrom svn r470.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-06 21:54:22 +00:00
Peter Stuge
19997aeb00 Clarify error message in enable_flash_sb600() a little
Corresponding to flashrom svn r469.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-06 15:05:39 +00:00
Carl-Daniel Hailfinger
1bfd6c9524 Improve SST25 status register routines
- Using a 4-bit index into an array with 8 elements leads to
out-of-bounds accesses. Use proper bit masking to fix this.
- Factor out common SST25 status register printing.
- Use the common SST25 status register printing for SST25VF080B.

Corresponding to flashrom svn r468.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-06 13:59:44 +00:00
Carl-Daniel Hailfinger
9bb88acc5e Revert r466 because of inverted logic
If unprotect succeeded, it will print "SB600 unprotect failed".

Corresponding to flashrom svn r467.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-06 13:51:44 +00:00
Peter Stuge
a66ceba293 Cleanup redundant condition and clarify message a little
Corresponding to flashrom svn r466.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-06 13:43:26 +00:00
Peter Stuge
7725fa8d63 Touch up some error messages in enable_flash_cs5536()
Corresponding to flashrom svn r465.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-06 13:38:55 +00:00
Carl-Daniel Hailfinger
f6e3efb9c4 Clean up the SB400 chipset enable code
Use pci_dev_find() instead of setting up a filter and iterating over PCI
devices.

Corresponding to flashrom svn r464.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
2009-05-06 00:35:31 +00:00
Carl-Daniel Hailfinger
41d6bd918f Rewrite the SB600 chipset enable function
- Check for read/write protected regions first.
- Region protection is write-once according to the data sheets. Check if
the write succeeded. Don't write if the region is not protected.
- Verbose region protection dumping.
- Improve readability of BAR mapping code.
- Align BAR mapping to a page boundary (4k) instead of a 16k boundary.

This patch prepares the code for a SPI detection heuristic.

Corresponding to flashrom svn r463.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-05 22:50:07 +00:00
Bertrand Jacquin
b452a913d6 Here is a fix for chipset_enable.c when there is not /dev/cpu
Open fails so there is no reason to lseek in. Actually this is a trivial
fix for a bad return value from open.

Corresponding to flashrom svn r462.

Signed-off-by: Bertrand Jacquin <beber@meleeweb.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
2009-05-05 21:08:36 +00:00
Peter Stuge
e612a11ab7 SST25VF080B TEST_OK_ ERASE WRITE
As reported by A. Spamlover. Thanks!

Corresponding to flashrom svn r461.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-05 16:34:53 +00:00
Uwe Hermann
87c07933a8 Some cosmetics in README and manpage
Also, move more stuff to the manpage where it belongs (this also
eliminates some duplicated contents).

Corresponding to flashrom svn r460.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-05 16:15:46 +00:00
Zheng Bao
284a60065d Force enabling SPI mode for SB600 is a bad idea and leads to hangs
Only access LPC ROM if we boot via LPC ROM. Only access SPI ROM if we
boot via SPI ROM.
The code to force enable SPI is commented out in case someone wants to
reenable it for a particular board with LPC and SPI flash.

Corresponding to flashrom svn r459.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-04 22:33:50 +00:00
Peter Stuge
98aa032c16 SST25VF080B TEST_OK_READ
Per report from from Henning Fleddermann. Thanks!

Corresponding to flashrom svn r458.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
2009-05-04 21:03:59 +00:00
Carl-Daniel Hailfinger
9e67585c5d Onwards with development
Re-add the svn revision to the version string.

Corresponding to flashrom svn r457.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-04 12:29:59 +00:00
Carl-Daniel Hailfinger
3f8f9b65e2 Flashrom 0.9.0
Corresponding to flashrom svn r454.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
v0.9.0
2009-05-04 12:18:10 +00:00