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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 07:23:43 +02:00

15 Commits

Author SHA1 Message Date
Neill Corlett
e98b2d1184 Add mediatek_i2c_spi interface
Add a spi_master interface supporting MediaTek MST9U ISP mode.

Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate
read/write commands, in case the MST9U is attached to smbus.

TEST=Successfully programmed SPI on test hardware.

Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820
Signed-off-by: Neill Corlett <corlett@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2022-02-01 22:22:03 +00:00
Victor Ding
cce29a4855 mec1308: remove MEC1308 EC programmer
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.

BUG=none
BRANCH=none
TEST=builds and ninja test passes

Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-09-22 13:22:42 +00:00
Victor Ding
e3f55a13ba ene_lpc: remove ENE LPC programmer
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.

BUG=none
BRANCH=none
TEST=builds and ninja test passes

Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-09-22 13:22:21 +00:00
Thomas Heijligen
732aafdfec CONFIG_DEFAULT_PROGRAMMER_NAME: Use programmer name instead of enum
CONFIG_DEFAULT_PROGRAMER_NAME replaces CONFIG_DEFAULT_PROGRAMMER.
It uses the name of the programmer for identification.
make CONFIG_DEFAULT_PROGRAMER_NAME=dummy and
meson -Ddefault_programmer_name=dummy will extend to
CONFIG_DEFAULT_PROGRAMER_NAME=&programmer_dummy in the code.

Change-Id: I976447787c6f6bfbdc0145d80d61e1ddcf97ac33
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-06-10 12:53:31 +00:00
Daniel Campello
0e5ae9577e meson: Add print_wiki option
Align meson options to be equivalent to the Makefile as they are used in
Gentoo's ebuilds.

Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I97d2fd687aa21533b86f9af446038bfe3da1f7d3
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-03-19 00:48:39 +00:00
Edward O'Callaghan
084d6a3cf3 meson: Rename 'config_raiden' to 'config_raiden_debug_spi'
Make meson build option name consistent with the the spi
masters implementation name.

BUG=none
TEST=builds

Change-Id: Icb6c73ab3d4369fcffb96eb117fc376da75dfb84
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49914
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Sam McNally <sammc@google.com>
2021-01-27 05:52:19 +00:00
Marc Schink
13a356815d meson: Add missing config option for J-Link SPI
Signed-off-by: Marc Schink <dev@zapb.de>
Change-Id: I476c649f9db7342688560aac9ee5df056517a028
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-12-13 01:09:25 +00:00
Victor Ding
821e44cb4d Add MEC1308 EC programmer
Initial support of Microchip MEC1308 Embedded Controller.

BUG=b:156144893
BRANCH=none

Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I2d51b4bdc0b38b6e488e71b9e774eb6232a2069e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/44541
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-08-20 11:11:35 +00:00
Victor Ding
436b4155b1 Add ENE LPC programmer
Initial support of ENE LPC interface keyboard controller.

BUG=b:156140422
BRANCH=none

Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I970afd8c1bd92c159c60e09f22e2f18c0433729d
Reviewed-on: https://review.coreboot.org/c/flashrom/+/44580
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-08-20 10:10:22 +00:00
Edward O'Callaghan
d97f87b00c Initial Realtek MST i2c_spi support
This spi master allows for programming of a Realtek RTD2142
MST with external SPI flash chip routed via its internal i2c
transport mechanism.

BUG=b:152558985,b:148745673
BRANCH=none
TEST=echo "00000000:0004ffff fw" > layout && \
  flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -r && \
  flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -w && \
  flashrom -p realtek_mst_i2c_spi:bus=8 --flash-size && \
  flashrom -p realtek_mst_i2c_spi:bus=8 --flash-name

Change-Id: I892e0be776fe605e69fb39c77abf3016591d7123
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40667
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Shiyu Sun <sshiyu@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-04 00:52:42 +00:00
Shiyu Sun
13a2ef6cbd lspcon_i2c_spi.c: Add SPI-master support for PS17{5,6}
This adds support for the Parade lspcon usb-c to HDMI protocol
translater part that is i2c-controlled. The support allows the
host to reach the SPI ROM that hangs off the part where it
stores its firmware.

Usage is as follows:
	flashrom -p lspcon_i2c_spi:bus=X
	where X is the bus number.

BUG=b:148746232
BRANCH=none
TEST=tested with following commands, read/write/erase works good.
	flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo;
	flashrom -p lspcon_i2c_spi:bus=7 -E;
	flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo;

Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-04-01 06:34:16 +00:00
Edward O'Callaghan
ad08aef69c raiden_debug: Upstream ChromiumOS servo debug board prog
Initial check-in of the Raiden debugger programmer.

Squash in,
  raiden_debug: Add missing .write_aai cb fn
  raiden_debug: greatly improve protocol documentation

BUG=b:143389556
BRANCH=none
TEST=builds

Change-Id: Ifad273a708acea4de797a0808be58960635a8864
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-03 06:02:23 +00:00
Angel Pons
3eae695319 Fix building with meson, again
Change-Id: Iea40da587729f3975a8901d3933e7567805242c5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2020-02-01 17:36:22 +00:00
Thomas Heijligen
b221cd7048 pickit2_spi: update to libusb1 and drop libusb0 dependency
TESTED: read, write, verify

Change-Id: Icfc5372aa1789d35ed22d68297d5e68a74d40388
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/32213
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-07-10 18:59:55 +00:00
Richard Hughes
cb97368328 Add support for the meson build system
The fwupd project has to build in all kinds of crazy targets, e.g. for odd
endians, odd instruction sets, and in odd ways, e.g. installing with a prefix
of /app for projects like flatpak. We also have other "robustness" guarantees
and therefore have a comprehensive set of CI tests which enable a lot of
warning flags and run linting and static analysis code like Coverity.

Rather than hack the Makefile I ported the codebase to use Meson.
Meson is a(nother) next-generation build system used by a lot of open source
projects ranging from low level libraries to desktop software. As part of the
port, I also copied the CONFIG_ logic from the makefile, e.g.

  Option                  Current Value Possible Values Description
  ------                  ------------- --------------- -----------
  config_atahpt           false         [true, false]   Highpoint (HPT) ATA/RAID controllers
  config_atapromise       false         [true, false]   Promise ATA controller
  config_atavia           true          [true, false]   VIA VT6421A LPC memory
...

At the moment I'm using the meson port so I can include flashrom as a subproject
to fwupd as distros are not yet shipping libflashrom as a shared library.

Change-Id: I3d950ece2a0568c09985eab47ddab9df1d0c43a2
Signed-off-by: Richard Hughes <richard@hughsie.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/31248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2019-04-02 17:33:27 +00:00