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f38431a5b2
I decided to fill in the info for a
few chips to illustrate how this works both for uniform and non-uniform
sector sizes.
struct eraseblock{
int size; /* Eraseblock size */
int count; /* Number of contiguous blocks with that size */
};
struct eraseblock doesn't correspond with a single erase block, but with
a group of contiguous erase blocks having the same size.
Given a (top boot block) flash chip with the following weird, but
real-life structure:
top
16384
8192
8192
32768
65536
65536
65536
65536
65536
65536
65536
bottom
we get the following encoding:
{65536,7},{32768,1},{8192,2},{16384,1}
Although the number of blocks is bigger than 4, the number of block
groups is only 4. If you ever add some flash chips with more than 4
contiguous block groups, the definition will not fit into the 4-member
array anymore and gcc will recognize that and error out. No undetected
overflow possible. In that case, you simply increase array size a bit.
For modern flash chips with uniform erase block size, you only need one
array member anyway.
Of course data types will need to be changed if you ever get flash chips
with more than 2^30 erase blocks, but even with the lowest known erase
granularity of 256 bytes, these flash chips will have to have a size of
a quarter Terabyte. I'm pretty confident we won't see such big EEPROMs
in the near future (or at least not attached in a way that makes
flashrom usable). For SPI chips, we even have a guaranteed safety factor
of 4096 over the maximum SPI chip size (which is 2^24). And if such a
big flash chip has uniform erase block size, you could even split it
among the 4 array members. If you change int count to unsigned int
count, the storable size doubles. So with a split and a slight change of
data type, the maximum ROM chip size is 2 Terabytes.
Since many chips have multiple block erase functions where the
eraseblock layout depends on the block erase function, this patch
couples the block erase functions with their eraseblock layouts.
struct block_eraser {
struct eraseblock{
unsigned int size; /* Eraseblock size */
unsigned int count; /* Number of contiguous blocks with that size */
} eraseblocks[NUM_ERASEREGIONS];
int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
} block_erasers[NUM_ERASEFUNCTIONS];
Corresponding to flashrom svn r719.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
------------------------------------------------------------------------------- flashrom README ------------------------------------------------------------------------------- flashrom is a utility for detecting, reading, writing, verifying and erasing flash chips. It is often used to flash BIOS/EFI/coreboot/firmware images in-system using a supported mainboard, but it also supports flashing of network cards (NICs), SATA controller cards, and other external devices which can program flash chips. It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. Packaging --------- To package flashrom and remove dependencies on subversion, either use make export or make tarball make export will export all flashrom files from the subversion repository at revision BASE into a directory named $EXPORTDIR/flashrom-$VERSION-r$SVNREVISION and will additionally modify the Makefile in that directory to contain the svn revision of the exported tree. make tarball will simply tar up the result of make export and gzip compress it. The snapshot tarballs are the result of make tarball and require no further processing. Build Instructions ------------------ To build flashrom you need to install the following packages or ports: Linux et al: * pciutils * pciutils-devel / pciutils-dev / libpci-dev * zlib-devel / zlib1g-dev (only needed if libpci is static) On FreeBSD, you need the following ports: * devel/gmake * devel/libpci To compile on Linux, use: make To compile on FreeBSD, use: gmake To compile on Nexenta, use: make To compile on Solaris, use: gmake LDFLAGS="-L$pathtolibpci" CC="gcc -I$pathtopciheaders" CFLAGS=-O2 To compile on DragonFly BSD, use: ln -s /usr/pkg/include/pciutils pci gmake CFLAGS=-I. LDFLAGS="-L/usr/pkg/lib" To compile and run on Darwin/Mac OS X: Install DirectIO from coresystems GmbH. DirectIO is available at http://www.coresystems.de/en/directio. Installation ------------ In order to install flashrom and the manpage into /usr/local, type: sudo make install For installation in a different directory use DESTDIR, e.g. like this: sudo make DESTDIR=/usr install Usage / Options --------------- Please see the flashrom(8) manpage. Exit status ----------- Please see the flashrom(8) manpage. coreboot Table and Mainboard Identification -------------------------------------------- Please see the flashrom(8) manpage. ROM Layout Support ------------------ Please see the flashrom(8) manpage. Supported Flash Chips / Chipsets / Mainboards --------------------------------------------- Please check the output of 'flashrom -L' for the list of supported flash chips, chipsets/southbridges, mainboards, and flash programmers. Contact ------- The official flashrom website is: http://www.flashrom.org/ The IRC channel is #flashrom at irc.freenode.net The Mailing list addess is flashrom@flashrom.org