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27 Commits

Author SHA1 Message Date
Tamas Zsoldos
104602c8ae
Update AArch64 features to Linux 6.6. (#347) 2023-11-27 09:58:26 +01:00
Mykola Hohsadze
494d9657ef
clang-format: hwcaps.h (#340) 2023-09-19 10:36:05 +02:00
Wang Xiang
0d5f398c58
Add loongarch64 Support (#314) 
* Add macros for LOONGARCH hwcaps

* Update hwcaps.h

* LoongArch Support

* Remove unused definitions.

* Add ignored feature in test.
 2023-08-23 20:35:29 +02:00
Tamas Zsoldos
b0913b4197
Update AArch64 features to Linux 6.4. (#310) 2023-06-09 16:47:44 +02:00
michael-roe
75ec988188
Add RISCV vector extension (#289) 
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
 2023-04-24 15:36:22 +02:00
Guillaume Chatelet
c919e9aa77
Support risc-v (#287) 
Co-authored-by: DaniAffCH <danieleaffinita2000@gmail.com>
Co-authored-by: Corentin Le Molgat <corentinl@google.com>
 2023-01-12 17:19:05 +01:00
marquitos0119
981fbe3914
S390X Support (#274) 
* support for s390x

* added z15 T01, T02 model checking

* removed z15 checking

* removed empty strings

* added s390x unit tests

* added reference url for hwcaps

* moved documentation to S390XFeatures struct, updated copyright date, removed unused include statement

* changed num_processors to int

* removed newlines from test inputs

* scripts: Add bootlin s390x support

* cmake(ci): Add s390x support

* ci: Add s390x workflow

Co-authored-by: Marcos <marcos.araque.fiallos@ibm.com>
Co-authored-by: Corentin Le Molgat <corentinl@google.com>
 2022-11-02 09:38:13 +01:00
michael-roe
c7c7751682
Add macros for RISCV hwcaps (#246) 
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
 2022-07-21 21:58:04 +02:00
michael-roe
08f2dc115e
Added some MIPS features. (#241) 
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
 2022-06-01 15:58:29 +02:00
Tamas Zsoldos
b04a9daf71
Update AArch64 features to Linux 5.17. (#237) 2022-04-27 10:26:29 +02:00
Guillaume Chatelet
b3ef4ef49d
Avoid leaking internal headers for ppc (#164) 2021-06-30 11:51:26 +02:00
Tamas Zsoldos
e2f6dea65f
Update AArch64 features to Linux 5.10 (#149) 
Added feature: MTE.
 2020-12-15 13:28:53 +01:00
Guillaume Chatelet
9a8f04b24c
[NFC] Generate separate tables via macro (#137) 
This is a non functional change, it allows:
 - Getting rid of `unix_features_aggregator`
 - Have a single blob describing the features
 - Fix wrong mocking of `hwcaps`

Downside: abuse of macros makes the code slightly magical and harder to understand.
It think it's still an improvement over the current situation as there's less repetition and less chances to get something wrong.
 2020-10-12 09:50:35 +00:00
Guillaume Chatelet
3cc8f310d9 [NFC] Update copyright from Google Inc. to Google LLC 2020-10-12 08:55:20 +00:00
Guillaume Chatelet
22a5362e11
[NFC] clang-format codebase (#134) 
* [NFC] clang-format codebase

* revert to 80 char columns at the price of uglier table init

* Specifically disabling clang-format for table initialization
 2020-09-23 09:52:20 +00:00
Tamas Zsoldos
73d10ad25b
Update features for AArch64 to Linux 5.8 (#122) 
This adds the following features: dcpodp, sve2, sveaes, svepmull,
svebitperm, svesha3, svesm4, flagm2, frint, svei8mm, svef32mm,
svef64mm, svebf16, i8mm, bf16, dgh and rng.

With these, all features used by Linux 5.8 on AArch64 is supported.

Fixes #126
 2020-09-21 07:50:38 +00:00
Tamas Zsoldos
d835b4958c Update features for AArch64. 
Add all missing features up to Linux v5.0.

Features added: evtstrm, atomics, fphp, asimdhp, cpuid, asimdrdm,
jscvt, fcma, lrcpc, dcpop, sha3, sm3, sm4, asimddp, sha512, sve,
asimdfhm, dit, uscat, ilrcpc, flagm, ssbs, sb, paca, pacg.
 2019-10-11 11:02:00 +02:00
Dr.-Ing. Patrick Siegl
bfd109b687 Completed all missing ARM hwcaps. (#79) 2019-06-26 12:56:52 +02:00
Dr.-Ing. Patrick Siegl
6482bad213 Added RPI zero with its features HALF, THUMB, FASTMULT, EDSP, JAVA and TLS (#75) 2019-06-18 12:53:08 +02:00
Guillaume Chatelet
9917e8481e
Fix hwcaps constants for mips. (#60) 
fixes #59
 2019-01-21 10:39:24 +01:00
Rashmica Gupta
c45e32f812
powerpc: Add AT_PLATFORM and AT_BASE_PLATFORM 
Some PowerPC machines can operate in a mode that appears different
to a process than the actual hardware. AT_PLATFORM indicates the
supported instruction set and AT_BASE_PLATFORM indicates the
actual microarchitecture of the hardware.

Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:24:58 +10:00
Rashmica Gupta
1c8bf0ecd8
hwcaps: Change uint32_t to unsigned long 
getauxval() returns an unsigned long which can be defined to be
more than 32 bits so don't force the result into a uint32_t.

Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:24:53 +10:00
Rashmica Gupta
3adafbfe66
powerpc: Added PowerPC implementation 
Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:24:45 +10:00
Arvid Gerstmann
a1ffdcbe70 Explicitly namespace every extern identifier 2018-04-26 10:31:03 +02:00
Guillaume Chatelet
e419573d10 Use CPU_FEATURES_ prefix for namespace macros. 2018-02-12 16:15:15 +01:00
Guillaume Chatelet
8e58ef0d2b Removing THIRD_PARTY_ from C headers. 2018-02-01 10:38:48 +01:00
Guillaume Chatelet
439d371594 Adding code. Closes #0. 2018-02-01 10:03:09 +01:00