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14 Commits

Author SHA1 Message Date
Vincent Fazio
5a4abf6a3c flashchips: Mark MT25QL02G as tested for PREW 
Tested via linux_spi [0].

[0]: https://paste.flashrom.org/view.php?id=3775

Change-Id: Ied3439b95104e37b7d22547ded883870eb2ab500
Tested-by: Jacob Zarnstorff <jzarnstorff@xes-inc.com>
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
 2025-09-01 10:47:44 +00:00
Vincent Fazio
09b72c2d56 flashchips: Mark MT25QU02G as tested for PREW 
Tested via linux_spi [0].

[0]: https://paste.flashrom.org/view.php?id=3774

Change-Id: Ida2ba300adf18280da325c1cf94a2df32f9163c6
Tested-by: Jacob Zarnstorff <jzarnstorff@xes-inc.com>
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88985
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2025-09-01 10:23:51 +00:00
James Vogenthaler
ff7091e9f4 flashchips: Add P25D80H 
Adds support for the PUYA P25D80H flashchip.
Tested:     Probing RDID, reading, erasing, and writing to a single chip.
Programmer: A serprog implementation that was flashed to a Raspbery Pi Pico 2.
Parameters: Tested at 1Mhz
OS:         Raspberry Pi OS 64-bit running kernel version 6.12.38
Datasheet:  https://lcsc.com/datasheet/lcsc_datasheet_2304140030_PUYA-P25D80H-SSH-IT_C559199.pdf

Change-Id: I48612c369b555fb8c3f3cfe3ce0d00d3fd35a64f
Signed-off-by: James Vogenthaler <james.vogenthaler@mantech.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
 2025-08-01 08:04:10 +00:00
Andranux
c0bf7928a2 flashchips: Add EN25QX128A 
I tested with an "ch341a" usb adapter.
I was able to read, erase and write successfully.

Datasheet: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25QX128A(2V).pdf

Change-Id: If6c5c3c37f3d817d93abdbc60c2d9280ff2585c3
Signed-off-by: Andranux <andranux+coding@posteo.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88327
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2025-07-25 08:56:37 +00:00
Nikola Z. Ivanov
bc8f7c71b8 flashchips: Mark W25Q64JV-.Q as tested for WP 
Tested via linux_spi on raspbery pi
Commands ran and output: https://paste.flashrom.org/view.php?id=3770
Chip datasheet: https://docs.rs-online.com/53b3/0900766b8162304e.pdf
Top side on marking on the chip is 25Q64JVSIQ.

Change-Id: I891a2082e2b662523571d761418860eb4a3f9671
Signed-off-by: Nikola Z. Ivanov <zlatistiv@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88183
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
 2025-06-28 08:38:07 +00:00
Anastasia Klimchuk
b1f2cb7c1a flashchips: Mark W25Q256JV_Q as tested for read/write/erase 
As reported on the mailing list:
https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/Y27HIB5SPMQVGER37RLPV36DW33QGLR4/

Change-Id: I267ee7e86c682626ead2310b920a0e5026982312
Tested-by: Attila Veghelyi <aveghelyi@dension.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87459
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: attila-v
 2025-04-30 00:11:59 +00:00
Dolan Liu
0cad6dfd68 flashchips: Add Macronix MX77U25650FZ4I42 
Add initial support for Macronix MX77U25650F

Bug=N/A
TEST=build flashrom and read/write/earse on unit works
e.g. command:
flashrom -p raiden_debug_spi:target=AP -w image.bin
flashrom --read -o image.bin
futility update/read

Change-Id: I7866b2db343f4eb2bc194400ceca099d3af3b87d
Signed-off-by: Dolan Liu <liuyong5@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86348
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: DZ <danielzhang@mxic.com.cn>
 2025-03-31 06:25:54 +00:00
Eric Park
505c259ca8 flashchips: Add XMC XM25QH64A 
Based off of the now-abandoned GitHub pull request here:
https://github.com/flashrom/flashrom/pull/239

Datasheet:
https://www.micros.com.pl/mediaserver/PFXM25QH64AHIG_0001.pdf

This commit applies the changes on top of the refactor where the flash
chip declarations were separated by vendor.

Change-Id: I5b11e30f0a5357a6cbb32ddb93f450de5364c60b
Co-authored-by: Ayushman Dutta <ayushman999@gmail.com>
Co-authored-by: "aiyion.prime" <git@aiyionpri.me>
Co-authored-by: Eric Park <me@ericswpark.com>
Signed-off-by: Eric Park <me@ericswpark.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86990
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2025-03-29 22:17:56 +00:00
Matt DeVillier
c3b89597fc flashchips/winbond: Update test status for Winbond W25Q128.JW.DTR 
Tested probe, read, erase, write, and WP operations on a Winbond
W25Q128.JW.DTR chip using internal and raiden_debug_spi programmers.

Change-Id: Ie2fdb2c305dca3677950cc6855d41b7161a0fce9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
 2025-03-16 21:58:33 +00:00
Matt DeVillier
4c6df1e168 flashchips/winbond: Update test status for Winbond W25Q128.W 
Tested probe, read, erase, write, and WP operations on a Winbond
W25Q128.W chip using internal and ch341a_spi programmers.

Change-Id: Ia1f2a5f4942a4f1956405afa5b56c9e38101f2be
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86544
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2025-02-24 06:43:36 +00:00
Kapil Porwal
1b9bcdc99b flashchips/winbond.c: Add reg_bits for W25Q256JW 
Add reg_bits for W25Q256JW as per the datasheet. The register
definitions are same as W25Q256JW_DTR.

Datasheet: https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&DocNo=DA00-W25Q256JW

BUG=b:376929528
TEST=Program and verify WP ranges

```
flashrom -p internal --wp-status
flashrom -p internal --wp-range 0x0,0x2000000
flashrom -p internal --wp-enable
flashrom -p internal --wp-status
```

Change-Id: I050754b28a90911a50f891869297524ce9a6720e
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/85323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
 2025-02-03 08:06:10 +00:00
Matt DeVillier
5ffbe0da88 flashchips/winbond: Update test status for Winbond W25Q256JV_M 
Tested probe, read, erase, write, and WP operations on a Winbond
W25Q256JV_M chip using internal and raiden_debug_spi programmers.

Change-Id: I48f37665c9578c4fdb360111f20958fbccc51a37
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/85896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
 2025-01-12 08:11:36 +00:00
Anton Samsonov
52a495b443 flashchips: Add Spansion S25FS512S 
Tested probe, read, erase, write on FS512SAIF01 chips
using Linux SPI and DediProg SF100 programmers.

This change affects S25FL512S identification as well,
so that both chips can be unambiguously detected by probing.

Datasheets used:
* Infineon-S25FS512S_512_Mb_1-DataSheet-v16_00-EN.pdf
    at https://www.infineon.com/dgdl/?fileId=8ac78c8c7d0d8da4017d0ed681a356fe
* Infineon-S25FL512S_512_Mb_64_MB_FL-S_Flash_SPI_Multi-I_O_3-DataSheet-v21_00-EN.pdf
    at https://www.infineon.com/dgdl/?fileId=8ac78c8c7d0d8da4017d0ed046ae4b53

Change-Id: I40b6c081ec7d57eac4f6d2b69cea3878bc92bb47
Signed-off-by: Anton Samsonov <devel@zxlab.ru>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/85585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
 2025-01-08 11:35:47 +00:00
Angel Pons
d07cd9f515 flashchips: Splitting flashchips into separate files by vendor 
To make the flashchips "database" easier to manage, split it by vendor
into several smaller files. This commit transfers the bulk of the data
to separate files and includes them from `flashchips.c`. Although this
is ugly (.c includes are usually frowned upon), it is a necessary evil
to make this commit reproducible.

Tested in two ways:

1) Output of `flashrom -L` has no diffs with/without the patch
compared with diff and cmp tools

2) flashrom binary has no diffs with/without the patch
compared with diff and cmp tools
Note for binary comparison documentation and manpages need to be
disabled (documentation is actually modified in the patch), also
version in meson.build set to "none" (otherwise git version counts
every commit).

Change-Id: I3a9ebb0575e2700c5871d16875495d9c8943b30b
Co-developed-by: Angel Pons <th3fanbus@gmail.com>
Co-developed-by: Anastasia Klimchuk <aklm@flashrom.org>
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
 2024-12-06 06:15:00 +00:00