- MSI MS-6153 (reported by Uwe Hermann <uwe@hermann-uwe.de>)
Tested by me on hardware. The board decodes max. 256 KB.
- MSI MS-6156 (reported by Uwe Hermann <uwe@hermann-uwe.de>)
Tested by me on hardware. The board decodes max. 256 KB.
Also, fix Dell PowerEdge 1850 name and add some more board URLs.
Corresponding to flashrom svn r749.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
SocketA + nForce2 + MCP2.
Motherboard includes a second ethernet controller and an Agere
firewire controller with valid subsystem ids, so these are used for
matching the board.
Corresponding to flashrom svn r746.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Eddie Vanhove <moonraket@hotmail.com>
This patch reorganises the board_ga_k8n_sli to create
nvidia_mcp_gpio_raise, a more general routine to set these bits.
Without docs, i can only assume that these memory area are gpio
lines.
Then it becomes easy to add support for this nForce4 SLI board.
Corresponding to flashrom svn r745.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Martin Szulecki <opensuse@sukimashita.com>
Add pciids for the new isa bridge, and hook it to the nforce2
chipset enable.
Corresponding to flashrom svn r744.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Martin Szulecki <opensuse@sukimashita.com>
So far, the only case where libz is needed is when a library (libpci)
pulls in libz and even then it only happens if libpci is available in a
static version only and said static version has libz requirements.
Check for libpci separately and don't require libz if it isn't needed.
Clarify the README.
Corresponding to flashrom svn r743.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Also, introduce BITMODE_BITBANG_SPI to eliminate a magic value.
Corresponding to flashrom svn r742.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This needs more testing and investigation (partly timing related, it
seems). Reads did work in multiple cases, though.
Corresponding to flashrom svn r740.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Cosmetics: Place curly brackets on a common line.
Add MX25V512 as alias name to MX25L512.
Add MX25V8005 as alias name to MX25L8005.
Add erase block definitions for
MX25L2005, MX25L4005, MX25L8005, MX25L1605
and change their status to TEST_OK_PRW where applicable.
Corresponding to flashrom svn r738.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
The new option is '-p gfxnvidia', rest of the interface is as usual.
I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro"
card for now, erase and write did NOT work properly so far!
Please do not attempt to write/erase cards yet, unless you can recover!
In addition to the NVIDIA handling code it was required to call
programmer_shutdown() in a lot more places, otherwise the graphics card
will be disabled in the init function, but never enabled again as the
shutdown function is not called.
The shutdown handling may be changed to use atexit() later.
Corresponding to flashrom svn r737.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
If you want support for a particular piece of hardware, just fill in
a few functions in spi_bitbang_master_table. That's it.
On top of this, the RayeR SPI flasher should be supportable in ~20 LOC.
Tested, trace looks OK.
Corresponding to flashrom svn r736.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This is successfully tested by me on the Elitegroup P6VAP-A+ board.
Corresponding to flashrom svn r732.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Annotate SST49LF004B quirks for TBL#.
Add TEST_OK_PRW which is useful when a PREW chip gets a new erase
routine.
Change a few erase function prototypes to use unsigned int instead of
int.
Corresponding to flashrom svn r731.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
I tested it on the Wyse Winterm S50 see attached test results.
Corresponding to flashrom svn r730.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
On the Wyse Winterm S50 lspci doesn`t show the cs5536 hostbridge and so
flashrom doesn`t detect the cs5536.
This patch is adding the cs5536 isa id [1022:2090] for chip detect.
Corresponding to flashrom svn r729.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This code has been tested.
Corresponding to flashrom svn r728.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
With the multicommand infrastructure I introduced in r645, it became
possible to integrate ICH SPI preopcodes cleanly into the flashrom
design.
The new code checks for every opcode in a multicommand array if it is a
preopcode. If yes, it checks if the next opcode is associated with that
preopcode and in that case it simply runs the opcode because the correct
preopcode will be run automatically before the opcode.
Corresponding to flashrom svn r727.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Trivial, and build-tested.
Corresponding to flashrom svn r726.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This is useful for libflashrom (you don't need wiki output in a coreboot
payload).
Wiki output is now disabled by default. If you want to enable it, run
make CONFIG_PRINT_WIKI=yes
Corresponding to flashrom svn r725.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Example make commandline if you want only internal programmers:
make CONFIG_FT2232SPI=no CONFIG_SERPROG=no CONFIG_NIC3COM=no
CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_DUMMY=no
Of course, all of the CONFIG_* symbols can be mixed and matched as
needed. CONFIG_FT2232SPI is special because even if it is enabled, make
will check if the headers are available and skip it otherwise.
Corresponding to flashrom svn r724.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r722.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
This commit fixes only some of the issues, those that were
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
I decided to fill in the info for a
few chips to illustrate how this works both for uniform and non-uniform
sector sizes.
struct eraseblock{
int size; /* Eraseblock size */
int count; /* Number of contiguous blocks with that size */
};
struct eraseblock doesn't correspond with a single erase block, but with
a group of contiguous erase blocks having the same size.
Given a (top boot block) flash chip with the following weird, but
real-life structure:
top
16384
8192
8192
32768
65536
65536
65536
65536
65536
65536
65536
bottom
we get the following encoding:
{65536,7},{32768,1},{8192,2},{16384,1}
Although the number of blocks is bigger than 4, the number of block
groups is only 4. If you ever add some flash chips with more than 4
contiguous block groups, the definition will not fit into the 4-member
array anymore and gcc will recognize that and error out. No undetected
overflow possible. In that case, you simply increase array size a bit.
For modern flash chips with uniform erase block size, you only need one
array member anyway.
Of course data types will need to be changed if you ever get flash chips
with more than 2^30 erase blocks, but even with the lowest known erase
granularity of 256 bytes, these flash chips will have to have a size of
a quarter Terabyte. I'm pretty confident we won't see such big EEPROMs
in the near future (or at least not attached in a way that makes
flashrom usable). For SPI chips, we even have a guaranteed safety factor
of 4096 over the maximum SPI chip size (which is 2^24). And if such a
big flash chip has uniform erase block size, you could even split it
among the 4 array members. If you change int count to unsigned int
count, the storable size doubles. So with a split and a slight change of
data type, the maximum ROM chip size is 2 Terabytes.
Since many chips have multiple block erase functions where the
eraseblock layout depends on the block erase function, this patch
couples the block erase functions with their eraseblock layouts.
struct block_eraser {
struct eraseblock{
unsigned int size; /* Eraseblock size */
unsigned int count; /* Number of contiguous blocks with that size */
} eraseblocks[NUM_ERASEREGIONS];
int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
} block_erasers[NUM_ERASEFUNCTIONS];
Corresponding to flashrom svn r719.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Use the correct reset sequence for 82802AB. Detailed explanation:
The reset sequence before ID reading was correct, so ID always
worked. But the reset sequence after ID reading was a copy-paste
leftover from probe_jedec and didn't have any effect. I dug up
flash_and_burn from the freebios-v1 tree and found out that 82802ab.c
was indeed a copy of jedec.c with lots of experimental unannotated #if 0
and #if 1.
About the wait_82802ab change:
Before the patch, wait_82802ab entered read status mode, switched to ID
mode, then tried an incorrect and unsupported JEDEC command to exit ID
mode. Nobody ever saw that this failed because all subsequent function
calls had the correct reset sequence at the beginning.
With the patch, wait_82802ab enters read status mode, then switches back
to read mode with the official reset command.
Corresponding to flashrom svn r717.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Fall back to svn info if svnversion fails.
Corresponding to flashrom svn r716.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Initialize the sockaddr,sockaddr_in union directly instead of running
memset later.
Corresponding to flashrom svn r715.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
The vendor sold different designs under that name, the patch works with
the one that has an Actel FPGA as PCI-to-Flash bridge.
The Flash chip is a "Macronix MX29F001B" (128 KB, parallel) soldered
directly to the PCB.
Flash operations (PROBE, READ, ERASE, WRITE) work as expected.
Corresponding to flashrom svn r712.
Signed-off-by: TURBO J <turboj@gmx.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The __func__ variant is standardized in C99 and recommended to be
used instead of __FUNCTION__ in the gcc info page.
Only _very_ old versions of gcc did not know about __func__, but we've
been using both __func__ and __FUNCTION__ for a long while now, and
nobody complained about this, so all our users seem to use recent
enough compilers.
Corresponding to flashrom svn r711.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Please refer to the release notes for a high-level overview of all the
amazing changes and added features since 0.9.0.
Corresponding to flashrom svn r709.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Even a failing chipset init (maybe due to unknown chipset) could still
get us reasonable probe results or at least forced reads.
Corresponding to flashrom svn r708.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This is a followup to r705.
Corresponding to flashrom svn r707.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Raises GP32 on IT8712F, and comes with a more general routine to set
io lines on the IT8712F.
Corresponding to flashrom svn r705.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Udu Ogah <putlinuxonit@gmail.com>
With this patch, make tarball and make export still work as expected,
but if you specify RELEASENAME=foo, then the directories and tarballs
are named flashrom-foo instead of flashrom-0.9.0-r703. This makes
release creation a lot easier. As an example, look at creating the 0.9.1
tarball: # make tarball RELEASENAME=0.9.1
Corresponding to flashrom svn r704.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Update bad board list and remove boards where either the chipset is
not supported (not a board issue) or where we have no report in the
archives.
Corresponding to flashrom svn r703.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
