Use `make HAS_LIBPCI=yes/no` to override the pkg-config detection and
`CONFIG_LIBPCI_CFLAGS` and `CONFIG_LIBPCI_LDFLAGS` to set cflags and
ldflags manually. The optional dependency of libpci libz, is
automatically handled by pkg-config.
Change-Id: I21b4a261b34b7e688635fc6e20b7beebfa64c7ed
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Let programmer only depend on the kind of hardware access method they
really need. Libpci no longer depends on all hardware access types since
each programmer handles this individually.
Change-Id: I5bdafaa3c5023ad6c4a695493eeddf11bc148085
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
As a part of effort to convert command line (and everything else)
to be libflashrom users, chip tests need to be converted as well.
TEST=ninja test
Change-Id: I965598cfa74e3fb7d0780ad34491f4057617691e
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61139
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
As a part of effort to convert command line (and everything else)
to be libflashrom users, chip tests need to be converted as well.
TEST=ninja test
Change-Id: I4493d4f269595783830c39a720b0a8963eab9daa
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61138
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
As a part of effort to convert command line (and everything else)
to be libflashrom users, chip tests need to be converted as well.
TEST=ninja test
Change-Id: I38529a6b4d79882f50068b3628089b178dbe0a50
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61137
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
dediprog_bulk_read_poll()'s finish argument allows it to be used in two
distinct cases: where dediprog_bulk_read_poll will be called as part of
a loop (finish=0) and where dediprog_bulk_read_poll should wait for all
outstanding transfers to finish (finish=1). In both cases,
dediprog_bulk_read_poll() calls libusb to process events with a 10
second timeout.
After dediprog_spi_bulk_read() has queued the last transfers, it calls
dediprog_bulk_read_poll() with finish=0 when it should be finish=1.
finish=0 just happens to work because frequently the transfers finish in
the 10 second timeout.
Signed-off-by: Rick Altherr <rick@oxidecomputer.com>
Change-Id: If7cb541742c8620358c8e04275d8316131b2d1ab
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Make the linux_mtd driver treat any negative return value from the
MEMERASE ioctl as an error. Previously it only treated -1 as an error.
BUG=b:213561594,b:210973586,b:182223106
BRANCH=none
TEST=builds
Change-Id: I40cfbdee2ab608fbe6c17d9cac6ec53ff224d9a4
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
While using the libflashrom API to read specific regions
there is no currently no general way to find the offset
into the read buffer of the expected region.
flashrom_layout_include_region() probably should have
returned the region offset and size if it was included.
However to avoid a change in API signature we can instead
hoist up get_region_range() into the API to be called after.
BUG=b:207808292
TEST=`make` && tested in porting cbfstool use-case.
Change-Id: I8cf95b5eaec943a51d0ea668f26a56bf6d6b4446
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Use `make HAS_LIBJAYLINK=yes/no` to override the pkg-config detection
and `CONFIG_LIBJAYLINK_CFLAGS` and `CONFIG_LIBJAYLINK_LDFLAGS` to set
cflags and ldflags manually.
Change-Id: I99df547046bb9820ab502f89f6d4452c1bc0cfd4
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Since the NI-845x is a Windows only proprietary library, disable it by
default. Use `HAS_LIB_NI845X=yes` to enable it. The default search path
is `${PROGRAMFILES}\National Instruments\NI-845x\MS Visual C` and can be
overwritten by `CONFIG_NI845X_LIBRARY_PATH`. Use
`CONFIG_LIB_NI845X_CFLAGS` and `CONFIG_LIB_NI845X_LDFLAGS` for setting
the cflags and ld flags manually.
Change-Id: I918c3605a5ac168708a6a10fd92ee2a1aae9729b
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Use `make HAS_LIBFTDI1=yes/no` to override the pkg-config detection and
`CONFIG_LIBFTDI1_CFLAGS` and `CONFIG_LIBFTDI1_LDFLAGS` to set cflags and
ldflags manually.
Change-Id: I41f5186d9f3e063c12c8c6eea888d0b0bf534259
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This patch adds a test for raiden_debug_spi and lots of libusb wraps.
libusb.h becomes required for tests to build and run, since new tests
are using libusb structs in depth and opaque symbols not sufficient
anymore.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: I880a8637ab02de179df9169c1898230bce4dc1c7
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
__xstat and __fxstat variants of stat/fstat are invoked under
chromium chroot. For all existing tests it is sufficient for
stat/fstat to "do nothing, return 0", so new wraps do just that.
Test which needs __xstat: linux_mtd lifecycle.
Tests which need __fxstat:
read_chip_test_success
read_chip_with_dummyflasher_test_success
write_chip_test_success
write_chip_with_dummyflasher_test_success
Without this patch tests above fail under chromium chroot.
BUG=b:181803212
TEST=running tests on three different environments,
1) stat64/fstat64 (ninja tests in upstream tree)
2) stat64/fstat64 (ninja tests in chromium tree)
2) __xstat64/__fxstat64 (emerge with tests in chromium tree)
Change-Id: I4c5c243acde09dc5bb6b2a14042fcd23a49707db
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tiger Lake has very low ICCRIBA (TGL=0x11, CNL=0x34 and CML=0x34) and
detects as unknown chipset compatible with 300 series chipset. Add a
new enum CHIPSET_500_SERIES_TIGER_POINT and treat it identically to
CHIPSET_400_SERIES_COMET_POINT. There are some exceptions though,
ICCRIBA is no longer present n descriptor content so a new union has
been defined for new fields and used in descriptor guessing.
freq_read field is not present on Tiger Lake, moreover in CannonPoint
and Comet Point this field is used as eSPI/EC frequency, so a new
function to print read frequency has ben added. Finally Tiger lake
boot straps include eSPI, so a new bus has been added for the new
straps.
TEST=Flash BIOS region on Intel i5-1135G7
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I28f3b6fe9f8ce9e976a6808683f46b6f4ec72bdd
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55578
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This patch adds two tests and initialises page_size in mock chip
chip_W25Q128_V. page_size was not needed for previous tests
(erase and read). page_size only needed to execute writing on chip
with dummyflasher, so it is added here.
BUG=b:181803212
TEST=ninja test
Change-Id: I6f0336613ab16a7e59857006496e3590ddb14d00
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Clean up the feature target by outsourcing the test to an own variable.
Change the print output and don't write to the build-details file.
This is in preparation for further changes.
Change-Id: I18fc27252afb49fa7d1f2787faee2b5b669275aa
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58627
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Clean up the feature target by outsourcing the test to an own variable.
Change the print output and don't write to the build-details file.
HAS_CLOCK_GETTIME=no replaces DISABLE_CLOCK_GETTIME=yes
This is in preparation for further changes.
Change-Id: Ie1f43b3d5a8ad79bff3f9bbc21f359ec35abc42a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
