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3965 Commits

Author SHA1 Message Date
Anastasia Klimchuk
7e38723877 tests: Add tests which run a chain of operations
The main purpose is to run one operation after the other to
check that data is carried in flash context correctly.

As the most common chains, the first tests perform:
probe+read
probe+write
probe+erase

Change-Id: I9b09e04c7dbee7e7658118d66aacb640885f4d23
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88257
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-08-05 00:59:38 +00:00
Varun Upadhyay
44df54b5e4 util/ich_descriptors_tool: Add Wildcat Lake SoC to supported chipsets
TEST=ich_descriptors_tool is able to detect "wildcat" chipset and show
below information:

> ./util/ich_descriptors_tool/ich_descriptors_tool
Need the file name of a descriptor image to read from.
usage: './util/ich_descriptors_tool/ich_descriptors_tool -f
<image file name> [-c <chipset name>] [-d]'
...
...
To also print the data stored in the descriptor straps you have to
indicate the chipset series with the '-c' parameter and one of the
possible arguments:
	- "ich8",
	- "ich9",
	- "ich10",
	- "apollo" for Intel's Apollo Lake SoC.
	- "gemini" for Intel's Gemini Lake SoC.
	- "jasper" for Intel's Jasper Lake SoC.
	- "meteor" for Intel's Meteor Lake SoC.
	- "panther" for Intel's Panther Lake SoC.
        - "wildcat" for Intel's Wildcat Lake SoC.
	...
	...
	- "300" or "cannon" for Intel's 300 series chipsets.
	- "400" or "comet" for Intel's 400 series chipsets.
	- "500" or "tiger" for Intel's 500 series chipsets.
	- "600" or "alder" for Intel's 600 series chipsets.

Change-Id: I2957eab19d8b8fdd2479f7d1b50ecdb48f491954
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88049
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-08-03 08:03:16 +00:00
Varun Upadhyay
446af8ae1c ichspi: Add support for Wildcat Lake
TEST=Flashrom is able to detect WCL SPI DID and show chipset name as
below:

> flashrom --flash-name
....
Found chipset "Intel Wildcat Lake".
....
> flashrom -p internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Found chipset "Intel Wildcat Lake".
Reading ich_descriptor... done.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS

Change-Id: Iaf1dc346b215c53cd2a0f6cf6e2cf4a8e6b5c19c
Signed-off-by: Varun Upadhyay <varun.upadhyay@intel.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-08-03 08:03:07 +00:00
James Vogenthaler
ff7091e9f4 flashchips: Add P25D80H
Adds support for the PUYA P25D80H flashchip.
Tested:     Probing RDID, reading, erasing, and writing to a single chip.
Programmer: A serprog implementation that was flashed to a Raspbery Pi Pico 2.
Parameters: Tested at 1Mhz
OS:         Raspberry Pi OS 64-bit running kernel version 6.12.38
Datasheet:  https://lcsc.com/datasheet/lcsc_datasheet_2304140030_PUYA-P25D80H-SSH-IT_C559199.pdf

Change-Id: I48612c369b555fb8c3f3cfe3ce0d00d3fd35a64f
Signed-off-by: James Vogenthaler <james.vogenthaler@mantech.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-08-01 08:04:10 +00:00
Anastasia Klimchuk
2beb555a6a MAINTAINERS: Add Anastasia Klimchuk for [lib]flashrom.c
Change-Id: Ief22cc11df9813a1e08a4f3a6805d2d6d61fd57b
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88493
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-07-25 08:58:11 +00:00
Andranux
c0bf7928a2 flashchips: Add EN25QX128A
I tested with an "ch341a" usb adapter.
I was able to read, erase and write successfully.

Datasheet: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/EN25QX128A(2V).pdf

Change-Id: If6c5c3c37f3d817d93abdbc60c2d9280ff2585c3
Signed-off-by: Andranux <andranux+coding@posteo.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88327
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-07-25 08:56:37 +00:00
Anastasia Klimchuk
7649c805fb VERSION: Update version to v1.7.0-devel
Change-Id: I741dcb6459f02903f5d6136d3095e0630fb033f2
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-07-25 02:52:38 +00:00
Anastasia Klimchuk
c7946a3d3f doc/release_notes: Add link to tarball for v1.6.0
Change-Id: I469b1c3da3a8ed4a8a1667705a0ef9d67bdfa3de
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88550
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-07-24 05:13:26 +00:00
Anastasia Klimchuk
8e36840a28 VERSION: Update version to v1.6.0
Change-Id: I3561aa49ee7b3c30d40beddcd1457ca9b8e803db
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
v1.6.0
2025-07-24 01:31:52 +00:00
Anastasia Klimchuk
b0cdde91db doc: Release notes for v1.6.0
Change-Id: I7067f0756bd7a3e6387039cbc4290526723dc4d8
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-07-23 23:49:45 +00:00
Peter Marheine
546c74e1fc doc: hall of fame: support correcting names that are wrong
We identified somebody whose name was malformed in git history such that
they were credited wrong in the hall of fame, so add some code to handle
names that manage to be committed with incorrect formatting.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I33b04932403b2d69da4648a3a7016aee57741d0d
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88477
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-07-21 09:32:31 +00:00
Anastasia Klimchuk
4e1d9ad953 VERSION: Update version to v1.6.0-rc2
Change-Id: I3d62baf6083a5ae2936ec16771e8e3a5a213181f
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88459
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
v1.6.0-rc2
2025-07-17 03:07:11 +00:00
Anastasia Klimchuk
af51624516 doc: Check minimum sphinx version for building hall of fame
Building authors/reviewers list (aka Hall of Fame) requires
more modern sphinx version than the rest of documentation. Also
we have separate meson options, `documentation` and
`generate_authors_list`, which both default to `auto`.

Auto mode is expected to check the environment and enable the
option if environment is suitable - or disable otherwise.

The patch check minimun required sphinx version specifically
for building hall of fame, the rest of documentation just checks
that sphinx is present.

So if developer has old version of sphinx, all the documentation
will be built, just without hall of fame.

Without this patch, developer with generate_authors_list=auto
(which is default) and old version of sphinx gets a build error
like this:
Exception occurred:
  File "/usr/lib/python3/dist-packages/docutils/nodes.py",
		line 652, in __getitem__
    return self.attributes[key]
KeyError: 'colwidth'
and a stack trace from sphinx source code

Change-Id: I8f0ae62f33dca04c2c5233ea45c6263f10cbe4f9
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-07-16 08:34:35 +00:00
Anastasia Klimchuk
966cd5194c VERSION: Update version to v1.6.0-rc1
Change-Id: Iefe3c3b2bdd62dd6afff97dc3fddef89d60e06ba
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88280
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
v1.6.0-rc1
2025-07-04 01:55:39 +00:00
Antonio Vázquez Blanco
51a7275a31 udelay: move into platform folder
Change-Id: I9910cd1f5850a6f86e26bb1dc4ff26614f0a0964
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88270
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-07-03 05:45:38 +00:00
Anastasia Klimchuk
e5f377c662 probe_flash: Introduce an error code for "other" probing errors
Previously probe_flash had the same return code for the case when
no chips were matched, and when some other error happened during
probing. However these are two different scenarios and it is useful
for the caller to distinguish between them.

In fact, the caller (libflashrom it is) wanted to distinguish
between "no chips found" and "some other probing error" from the
very beginning. libflashrom probe API documented returning special
error code for "other error".
However it was not possible to know when "other error" happened
because probe_flash never returned that back, it could only say
"no matched chips found".

This patch introduces -2 as "other error" code from probe_flash,
while -1 remains as "no chips found".
Both libflashrom probe APIs v1 and v2 are now handling "other error"
from probe_flash and return it to the API callers as was promised in
the documentation.

This also adds a unit test for error code propagation for "no chips
found" error.

Change-Id: I4a271550bea2b36c657c71ce6cb1927082663c3c
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-07-01 02:29:36 +00:00
Anastasia Klimchuk
b41fc17099 libflashrom: Deprecate probing v1 API
flashrom_flash_probe marked as deprecated and existing tests are
updated to use probing v2 API

Change-Id: I88f78ac0c93ce99a555b42f87aa0a695089e0b3f
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-06-30 01:24:47 +00:00
Nikola Z. Ivanov
f1f0dd6ab3 cli_classic.c: Reimplement parse_wp_range
Current method modifies the optarg string and
causes it to not get printed in future debug log.

For example writing the log to a file with -o
will show "Command line" without the size
parameter of the range.

Tested by logging the output and reading the log:
./flashrom -p linux_spi:dev=/dev/spidev0.0 -c "W25Q64JV-.Q" \
--wp-range 0x0,0x00001000 -o logfile && grep 'Command line' logfile

Change-Id: I77acd49a5fa17a0af69b4fb1371a131a5249d3dc
Signed-off-by: Nikola Z. Ivanov <zlatistiv@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88162
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-06-29 04:37:03 +00:00
Nikola Z. Ivanov
bc8f7c71b8 flashchips: Mark W25Q64JV-.Q as tested for WP
Tested via linux_spi on raspbery pi
Commands ran and output: https://paste.flashrom.org/view.php?id=3770
Chip datasheet: https://docs.rs-online.com/53b3/0900766b8162304e.pdf
Top side on marking on the chip is 25Q64JVSIQ.

Change-Id: I891a2082e2b662523571d761418860eb4a3f9671
Signed-off-by: Nikola Z. Ivanov <zlatistiv@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88183
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-06-28 08:38:07 +00:00
Attila Veghelyi
ed47c87176 jlink_spi: Increase delay on power on feature from 10 to 100 millisec
More delay time is needed to stabilize the LDO and the decoupling
capacitors when power on feature is enabled. Specifically 100 ms
was tested on HT7333 and it's sufficient.

I used the power supply from the J-Link device pin 19.
this power is 5V, I put a 3.3V LDO (HT7333) after it, and this LDO
(and decoupling capacitors) need more time to fix output voltage.

Change-Id: Ic2dd94e99ac6ffa17a009b8488ce027698ae2c28
Signed-off-by: Attila Veghelyi <aveghelyi@dension.com>
Tested-by: Attila Veghelyi <aveghelyi@dension.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86085
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-06-06 00:13:27 +00:00
Matt DeVillier
1516420f3f fmap: Skip unreadable regions when attempting to locate FMAP
When using the on-chip FMAP to restrict flashrom operations to one or
more regions (--fmap), flashrom must first locate the FMAP. This
requires flashrom to read from multiple addresses, some of which
may be located in regions which are not readable (such as the
Intel ME region). In order to avoid a substantial amount of output from
read_flash() when trying to locate the FMAP in these regions, set
`the skip_unreadable_regions` flag before performing any reads to
locate the FMAP, and restore the original flag value when finished.

This resolves https://ticket.coreboot.org/issues/587

TEST=build flashrom, use cli to update COREBOOT and EC FMAP regions on
an Intel Alderlake-N platform board (starlabs/starlite_adl).

Change-Id: Ie78b977b4e6a5db02a25e69603f697834043ea99
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87748
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-05-22 23:12:01 +00:00
Anastasia Klimchuk
9d6ce34659 doc/devel: Add info about new libflashrom APIs
Change-Id: I98524353b8bedff3364568636ed42a4bd6ce8b3d
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-05-16 10:22:47 +00:00
Anastasia Klimchuk
0c63f85d7d cli: Remove array of flash contexts, use one active context instead
The only purpose of array of 8 flash contexts was to facilitate
probing of multiple chips. Probing is now done inside libflashrom,
and cli as a client of libflashrom only need to have one active
context.

In addition to array of 8, cli also had one more flash context,
`fill_flash` which is also now replaced by the same, one active
context.

Another detail is that array of 8 was effectively a limit of how
many mathing chips could be found. While 8 seemed a lot at the time
of initial implementation, at the moment we have an example of
6 matches already.
(see `./flashrom -p dummy:emulate=MX25L6436`)

Change-Id: Ia4284ae7aaa43fe59f0d3f57314ebc5cc93d2d9b
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87533
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-05-12 09:24:51 +00:00
Anastasia Klimchuk
18303f193a libflashrom: Add probing v2 which can find all matching chips
Probing v2 can (if requested) go through all flashchips and find
all the matching chip definitions. This is the way cli behaves,
so cli becomes a client of probing v2.

Previously cli and libflashrom had different probing logic, and
different code in different source files.

This patch also adds tests for probing v2.

Testing from the cli:
./flashrom -p dummy:emulate=W25Q128FV -r dump.rom
./flashrom -p dummy:emulate=MX25L6436 -r dump.rom
./flashrom -p dummy:emulate=MX25L6436 -c "MX25L6473E" -r dump.rom
./flashrom -p dummy:emulate=SST25VF032B -E
./flashrom -p dummy:emulate=S25FL128L -r dump.rom
./flashrom -p dummy:emulate=INVALID -r dump.rom
./flashrom -p dummy:emulate=MX25L6436 -c "NONEXISTENT" -r dump.rom

Change-Id: Idfcf377a8071e22028ba98515f08495ed2a6e9f0
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87341
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-05-12 09:24:34 +00:00
Anastasia Klimchuk
b1f2cb7c1a flashchips: Mark W25Q256JV_Q as tested for read/write/erase
As reported on the mailing list:
https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/Y27HIB5SPMQVGER37RLPV36DW33QGLR4/

Change-Id: I267ee7e86c682626ead2310b920a0e5026982312
Tested-by: Attila Veghelyi <aveghelyi@dension.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87459
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: attila-v
2025-04-30 00:11:59 +00:00
Anastasia Klimchuk
4d4688ccf1 doc: Update supported flashchips page because we split the large file
Change-Id: Ic6179517d0f951a32c0c4e0baf32677398224542
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86953
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-04-11 00:34:26 +00:00
Dmitry Zhadinets
bc029c2f45 libflashrom: Add API to get the list of supported programmers
There were no options available to obtain the list of programmers.
The implementation is based on flashrom_supported_flash_chips.
Arrays of constant strings are returned, and the array must be
freed using flashrom_data_free.

Testing: Both unit tests and CLI tools serve as libflashrom clients.
    All unit tests run successfully.

Change-Id: Ib5275b742b849183b1fe701900040fee369a1d78
Signed-off-by: Dmitry Zhadinets <dzhadinets@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-04-10 00:51:35 +00:00
Dmitry Zhadinets
6ff43de0e0 libflashrom: Fix dynamic linkage
flashrom_set_log_level was not added to the map file

Testing: Both unit tests and CLI tools serve as libflashrom clients.
    All unit tests run successfully.

Change-Id: Iaa9f50d79364cd3ba8242e4faea7612c88e7053c
Signed-off-by: Dmitry Zhadinets <dzhadinets@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-04-10 00:47:35 +00:00
Anastasia Klimchuk
f163f1c692 libflashrom: Set maximum log level SPEW by default
This log level is the maximum level that will trigger the log
callback. By default log callback should be triggered for all
messages, and then client can decide whether they want to lower
the level.

This also keeps the same behaviour for existing clients of
libflashrom, the same as it was before introducing the ability
to set max log level in log callback API.

Follow up on
commit 4e334c4f79

Change-Id: Id063c31e685c930b9f5632c7b86ffac6fe477fd5
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dmitry Zhadinets <dzhadinets@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2025-04-06 22:52:44 +00:00
Anastasia Klimchuk
79f0d814c2 cli: Set maximum log level for log callback
Follow up (or fix) on
commit 6571f263b5
which adds ability to set maximum log level to log callback API.
And INFO as the default.

Without this patch cli options -V, -VV, -VVV not working anymore.

cli at the moment processes all the messages in the callback,
so log level should be maximum possible to get all the messages.

Alternative to this could be setting the default max log level
for callback as SPEW.

Tested by running with -V, -VV, -VVV
flashrom -p dummy:emulate=W25Q128FV,freq=64mhz -r dump.rom --progress

Change-Id: I70a02ea1a1d692267fd6d92cdb5273786a913777
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dmitry Zhadinets <dzhadinets@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2025-04-06 00:15:47 +00:00
Dmitry Zhadinets
6571f263b5 libflashrom: Add set log level functionality
Before this commit, any message from Flashrom would trigger
the user's callback. This could lead to additional delays
and slow down overall Flashrom performance.

This patch adds the ability to configure the log level for
messages from Flashrom. It sets the default log level to INFO

Testing: Both unit tests and CLI tools serve as libflashrom clients.
    All unit tests run successfully.

Change-Id: I095d48b8feb5fbc950a36eb17bed0d7cb8d9df64
Signed-off-by: Dmitry Zhadinets <dzhadinets@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87047
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-04-04 11:35:23 +00:00
Dmitry Zhadinets
b1794138f0 libflashrom: Update the API for Logger Callback
The initial implementation does not account for user_data, requiring
the calling application to use a global scope. This may lead to issues
related to object lifecycle management and other architectural
concerns.

This patch adds user_data to the user’s log callback. Moreover, it
performs message formatting, so the application only needs to pass
the formatted string to the selected output.

The change does not break the existing logging API but extends it.
A new API version is introduced with the v2 suffix.

Testing: Both unit tests and CLI tools serve as libflashrom clients.
    All unit tests run successfully.

Change-Id: Iea738bd371fa3d69b9cf222c89ee67490d30af39
Signed-off-by: Dmitry Zhadinets <dzhadinets@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86875
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-04-04 11:35:09 +00:00
Michał Kopeć
90cc93d9bb chipset_enable.c: Mark Intel B150 and Q170 as tested
Mark both B150 and Q170 as tested (DEP, as writability depends on the
flash descriptor). B150 was found in a ThinkCentre M700 Tiny, and Q170
in a ThinkCentre M900 Tiny, both support internal flashing once coreboot
is flashed (and coreboot SPI flash lockdown is not enabled).

Change-Id: Iedf4c77e3228628ac1a8726c1a9b4fb733d63d40
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/87045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-04-03 11:28:42 +00:00
Dolan Liu
0cad6dfd68 flashchips: Add Macronix MX77U25650FZ4I42
Add initial support for Macronix MX77U25650F

Bug=N/A
TEST=build flashrom and read/write/earse on unit works
e.g. command:
flashrom -p raiden_debug_spi:target=AP -w image.bin
flashrom --read -o image.bin
futility update/read

Change-Id: I7866b2db343f4eb2bc194400ceca099d3af3b87d
Signed-off-by: Dolan Liu <liuyong5@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86348
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: DZ <danielzhang@mxic.com.cn>
2025-03-31 06:25:54 +00:00
Eric Park
505c259ca8 flashchips: Add XMC XM25QH64A
Based off of the now-abandoned GitHub pull request here:
https://github.com/flashrom/flashrom/pull/239

Datasheet:
https://www.micros.com.pl/mediaserver/PFXM25QH64AHIG_0001.pdf

This commit applies the changes on top of the refactor where the flash
chip declarations were separated by vendor.

Change-Id: I5b11e30f0a5357a6cbb32ddb93f450de5364c60b
Co-authored-by: Ayushman Dutta <ayushman999@gmail.com>
Co-authored-by: "aiyion.prime" <git@aiyionpri.me>
Co-authored-by: Eric Park <me@ericswpark.com>
Signed-off-by: Eric Park <me@ericswpark.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86990
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-03-29 22:17:56 +00:00
Simon Arlott
81c21880a3 spidriver: Add support for the Excamera Labs SPIDriver programmer
This is a SPI hardware interface with a display (https://spidriver.com/),
connected as an FT230X USB serial device at a fixed baud rate of 460800.

Firmware: https://github.com/jamesbowman/spidriver
Protocol: https://github.com/jamesbowman/spidriver/blob/master/protocol.md

Most of the implementation is copied from the Bus Pirate programmer.

Tested with a SPIDriver v2 by reading FM25Q128A flash memory on Linux.

Change-Id: I07b23c1146d4ad3606b54a1e8dc8030cf4ebf57b
Signed-off-by: Simon Arlott <flashrom@octiron.net>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-03-26 21:56:00 +00:00
Matt DeVillier
c3b89597fc flashchips/winbond: Update test status for Winbond W25Q128.JW.DTR
Tested probe, read, erase, write, and WP operations on a Winbond
W25Q128.JW.DTR chip using internal and raiden_debug_spi programmers.

Change-Id: Ie2fdb2c305dca3677950cc6855d41b7161a0fce9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-03-16 21:58:33 +00:00
Antonio Vázquez Blanco
b169da4edb tests/chip: fix print format errors in gcc 14.2.0
Change-Id: I8c461accefddce3d5ee33b0fb6b91c434d721945
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2025-03-16 10:41:26 +00:00
Anastasia Klimchuk
4054920f09 doc: Final cleanup of remaining references to the old wiki website
Change-Id: Ie002c1242075c8becb59d26bd9c562c7616233c1
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2025-03-09 07:34:53 +00:00
Anastasia Klimchuk
e2df58a379 libflashrom: Update the API for progress callback
The initial version of API for progress callback would require the
callback function to make a second call to get the needed data about
progress state (current, total etc).

This patch changes the callback API, so that callback function gets
all needed data straight away as parameters, and with this,
callback has all the data to do its job.

Since the initial version was submitted and it was in the tree for a
while, the change needs to add a _v2 suffix for new thing and
deprecated attribute for old thing.

Testing: both unit tests and cli are libflashrom clients.
All unit tests run successfully, for the cli all scenarios from
commit 75dc0655b9 run successfully.

Change-Id: Ia8cc0461c449b7e65888a64cdc594c55b81eae7a
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
2025-03-09 07:34:06 +00:00
Patrick Georgi
f5a3c7a35b util/docker: Update the script that updates the website
- Update the base system (alpine 3.8 -> 3.21)
- Update sphinx and its modules (and from pip-install to alpine-install)
- Remove unused features that increase maintenance overhead
  (autobuild/livehtml and ditaa)
- Use the build system to generate docs (instead of calling sphinx in
  its own, custom ways)

Change-Id: I844e4ea84b94444c96f29325fee205b0deb972da
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86681
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-03-06 10:12:19 +00:00
Anastasia Klimchuk
73666de3f2 Enable authors list generation on Jenkins
Change-Id: Ia018ce4addb65273fe022ed1f1e9d38420c0e469
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86678
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-03-06 02:35:40 +00:00
Peter Marheine
0b39a3e00c doc: autogenerate a list of authors and hall of fame
This adds a build-time option to automatically generate a list of
authors from git history, and includes it in the documentation by
reading the output from git in a Sphinx extension. When git isn't
available or the project source doesn't appear to be a git checkout, the
list is not generated and gracefully replaced with a message explaining
its absence.

Change-Id: I1e9634a90e84262aafd80590deba9875f4b71a3c
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-02-28 03:56:40 +00:00
Anastasia Klimchuk
07beef6999 doc: Add useful links to README
Change-Id: Ib231150acd8aa911d534f67ff1ce937c6963812c
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86430
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-02-24 06:50:19 +00:00
Anastasia Klimchuk
927b5adbe6 doc: Add missing step in the beginning of building from source doc
Change-Id: Id834d3de69c038f3cc1aee3c59c3607f42fd5b49
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86429
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-02-24 06:50:10 +00:00
Stefan Reinauer
b7ed1634b8 doc: Remove reference to coreboot dev guidelines
The guidelines are fully specified on flashrom.org, no need to
reference them.

Change-Id: If5fbcf1f4dc00dd1a9c48e9fad6c99d646954bfb
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
2025-02-24 06:47:57 +00:00
Stefan Reinauer
49e33c8939 doc: Point to web page instead of Wiki for Laptops page
There were three occurences pointing to the retired wiki instead
of the web page https://flashrom.org/contrib_howtos/laptops_and_ec.html

Change-Id: I62950e1099183171dd3b94200014034b0616a4b4
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
2025-02-24 06:47:34 +00:00
Stefan Reinauer
5e56f42eaa doc: Point to correct kernel coding style
Right now it points to the source of the page instead of the
actual page.

Change-Id: Ib52de1312419cc48478fb965ccb104bdb0dea9b6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86545
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
2025-02-24 06:47:12 +00:00
Matt DeVillier
4c6df1e168 flashchips/winbond: Update test status for Winbond W25Q128.W
Tested probe, read, erase, write, and WP operations on a Winbond
W25Q128.W chip using internal and ch341a_spi programmers.

Change-Id: Ia1f2a5f4942a4f1956405afa5b56c9e38101f2be
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86544
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-02-24 06:43:36 +00:00
Antonio Vázquez Blanco
ce825859c4 Move SPI declarations from flash.h to spi.h
As a consecuence, some of the files that used to include flash.h no
longer need to do so. For this reason, flash.h includes are also deleted
in this commit.

Change-Id: I794a71536a3b85fde39f83c802fa0f5dd8d428e0
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/85539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: David Reguera Garcia (Dreg) <regueragarciadavid@gmail.com>
Reviewed-by: Matti Finder <matti.finder@gmail.com>
2025-02-21 07:17:57 +00:00