This board was used/sold by Fujitsu. The board enabled was tested (sadly
with the wrong image, i.e. one of the GA-8SIMLH images directly from
GIGABYTE instead of one from Fujitsu).
Corresponding to flashrom svn r1855.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested mainboards:
OK:
- ASUS F2A85-M
Reported by various corebooters
- ASUS M2N-MX SE Plus
Reported by Antonio
- ASUS P5LD2
Reported by François Revol
- Lenovo ThinkPad T530
Reported and partially authored by Edward O'Callaghan
- MSI MS-7502 (Medion MD8833)
Reported by naq on IRC
- Shuttle AB61
Reported by olofolleola4
- ZOTAC IONITX-F-E
Reported by Bernardo Kuri
Flash chips:
- Atmel AT45DB021D to PREW (+PREW)
Reported by The Raven
- Atmel AT25F4096 to PREW (+PREW)
Reported by 공준혁
- GigaDevice GD25Q16(B) to PREW (+PREW)
Reported by luxflow@live.com using a GD25Q16BSIG
- Catalyst CAT28F512
Mark erase and write as known bad (not implemented)
Miscellaneous:
- Various spelling corrections by Daniele Forsi.
- Added and refined a bunch of chips originally investigated by Carl-Daniel.
- Marked the ARM-USB-OCD-H programmer as tested
(reported by Ruud Schramp).
- Tiny other stuff.
Corresponding to flashrom svn r1839.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
ASUS Vintage 2 PH1 barebone systems have a mainboard from the P5LD2 series,
namely the P5LD2-MQ (although it is labeled V2-PH1). Pin 16 GPIO needs to
be raised to enable write/erase like on other boards of the series.
NB: it uses a ICH7DH southbridge and hence requires different PCI IDs.
Corresponding to flashrom svn r1828.
Signed-off-by: Dima Veselov <kab00m@lich.phys.spbu.ru>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Check for NULL termination of the array, that each board has the two
main PCI ID sets defined, that coreboot vendor and model fields are either
both set or unset, and that at least either an enable function or a max
decode size is available.
Corresponding to flashrom svn r1821.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested mainboards:
OK:
- abit BX6 2.0
Reported by Stefan Tauner
- Acer EM61SM/EM61PM (used in Acer Aspire T180)
Reported by Benjamin Bellec
- ADLINK Express-HR
Reported by Obermair Thomas
- ASUS M3N-H/HDMI
Reported by Franc Serres
- Attro G5G100-P
Reported by Christoph Grenz
- ASRock 960GM-GS3 FX
Reported by Fuley Istvan
- Elitegroup P6BAP-A+ (V2.2)
Reported by Arnaldo Pirrone
- Elitegroup GeForce7050M-M (V2.0)
Reported by Leif Middelschulte
- Fujitsu D3041-A1 (used in ESPRIMO P2560)
Reported by Daggi Duck
- GIGABYTE GA-8S648
Reported by TeslaBIOS
- GIGABYTE GA-970A-D3P (rev. 1.0)
Reported by Jean-Francois Pirus
- GIGABYTE GA-B85M-D3H
Reported by Mladen Milinković
- GIGABYTE GA-X79-UD3
Reported by Jeff O'Neil
- GIGABYTE GA-X79-UP4 (rev. 1.0)
Reported by George Spelvin
- GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3)
Reported by Vangelis Skarmoutsos
- GIGABYTE GA-Z87-HD3
Reported by virii5
- Lenovo Tilapia CRB
Reported by jenkins56 on IRC
- MSI GT60-2OD (notebook, only with layout patches)
Reported by Vasiliy Vylegzhanin
- MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid)
Reported by professorll
- MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640)
Reported by Koen Rousseau
- MSI MS-7125 (K8N Neo4(-F/FI/FX))
We had a board enable for that one for years, but it was not (and still is not)
completely clear which boards are covered.
- MSI MS-7522 (MSI X58 Pro-E)
Reported by Gianluigi Tiesi
- PCWARE APM80-D3
Reported by César Augusto Jakoby
- Pegatron IPP7A-CP
Reported by Илья Шипко
- Supermicro H8QME-2
Reported by Greg Tippitt
- Supermicro X7SPA-H
Reported by Kyle Bentley
- Supermicro X7SPE-HF-D525
Reported by Micah Anderson
- Supermicro X8DTE
Reported by Mark Nipper
- Supermicro X8SIL-F
Reported by Peter Samuelson
- ZOTAC IONITX-A (-E) version
Reported by Maciej Wroniecki
NOT OK:
- Supermicro X10SLM-F
Reported by Micah Anderson
Flash chips:
- Atmel AT29C020 to PREW (+PREW)
It was marked like that in the past, but I could not find the reason why the
test bits were reset. Urja Rannikko tested it again and it still works.
- Eon EN25F10 to PREW (+PREW)
Reported by Stolmár Tamás
- Eon EN25QH64 to PR (+PR)
Reported by Vladimir 'φ-coder' Serbinenko
- GigaDevice GD25Q32(B) to PREW (+PREW)
Reported by mrnuke
- Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW)
Reported by Jamie Nichol
- Macronix MX25L2005(C) to PREW (+PREW)
Reported by Давыдов Дмитрий
- Micron/Numonyx/ST N25Q064..1E to PREW (+PREW)
Reported by Paolo Zambotti
- Pmc Pm25LD010(C) to PREW (+PREW)
Reported by Vasile Ceteras
- Micron/Numonyx/ST M25P16 to PREW (+EW)
Reported by raven
- Micron/Numonyx/ST M25PX64 to PREW (+W)
Reported by Zaolin
- SST SST25VF020B to PREW (+PREW)
Reported by Michaël Zweers
- SST SST49LF040 to PREW (+W)
Reported by Oskar Enoksson
- Add support for MX25L3273E (evil twin of MX25L3205 et al.)
Also, add MX25L1673 and MX25L6473E to the names of their twins and
add a note about MX25L8073E.
- Winbond W25X32 to PREW (+REW)
Reported by The Raven
- Winbond W29C010 etc. to PREW (+W)
Reported by san
Chipsets tested OK:
- Intel NM70 (8086:1e5f)
Reported by mrnuke
- Intel C204 (8086:1c54)
Reported by Vasiliy Vylegzhanin
- Intel QM67 (8086:1c4f)
Reported by Obermair Thomas
- Intel HM77 (8086:1e57)
Reported by Vasiliy Vylegzhanin
- Intel B85 (8086:8c50)
Reported by Mladen Milinković
- Intel HM87 (8086:8c4b)
Reported by Vasiliy Vylegzhanin
- Intel Z87 (8086:8c44)
Reported by virii5
- NVIDIA MCP51 (10de:0261)
Reported by Marcin Kościelnicki
- SiS 648 (1039:0648)
Reported by TeslaBIOS
Miscellaneous:
- Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_).
- getrevision.sh: Ignore failing date calls.
- getrevision.sh: Fix -u and -l for older git versions which require = for the
git log grep parameter.
- Corrected K8T Neo2-F entries due to a report from Stelios Tsampas.
- Add "-p internal" to output that requests users to send flashrom -V logs.
- Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist.
- Tiny other stuff.
Corresponding to flashrom svn r1783.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Use the same trick as for the MX-SE variant.
Despite being mentioned as supported on
http://flashrom.org/Supported_hardware flashrom fails to detect the
flash chip without this.
Corresponding to flashrom svn r1766.
Signed-off-by: François Revol <revol@free.fr>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested on real hardware by TeslaBIOS.
Besides the usual board_enable stuff the GPIO definitions for the ICH7 DH
were also missing. Apparently Intel forgot to add the PCI IDs for the desktop
version in the spec update, but the normal datasheet mentions the DH
desktop version so this should be fine...
Corresponding to flashrom svn r1764.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Because the board does not have any PCI subsystem IDs set and the
DMI strings are not very specific at all, autodetection has been disabled.
The GPIO was found by roxfan and the patch tested on hardware by Gelip,
thanks!
Corresponding to flashrom svn r1762.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Previously we had to rely on dmidecode to decode the DMI/SMBIOS table.
This patch integrates a DMI decoder into flashrom. The old behavior of calling
dmidecode can be brought back by using CONFIG_INTERNAL_DMI=no.
Significant portions of this patch were taken from dmidecode, hence add its
authors to the copyright notice (dmidecode is also GPL2+). We do a few things
differently though. First of all we do more bounds checking to prevent accessing
unmapped memory. We do not support disovery via EFI (yet), but memory
scanning only. We handle the chassis-type lock bit correctly which dmidecode
did not for a long while.
The API to the rest of flashrom remains stable, but the output changes slightly.
To share as much code as possible (which actually is not much), i have added
dmi_fill methods that get called in dmi_init. They are reponsible to fill the
dmi_strings array and setting the is_laptop variable. After it is called, dmi_init
prints all dmi_strings. Previously the strings were printed in the order they were
discovered, followed by the chassis-type, which is now output earlier (in dmi_fill).
Because DJGPP does not support strnlen a simple implementation was added
for it.
This is still only available on x86; actually it is not even compiled in for other
architectures at all anymore.
Corresponding to flashrom svn r1735.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This patch replaces Alex Mauer's previous patch for this board (from 2008).
Tested to read, erase, and write on 2 different boards, both with AMIC
A29040BL flash chips, using both stock BIOS and coreboot images.
This patch marks the AMIC chip as tested at the same time.
Corresponding to flashrom svn r1733.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and
Yangtze (Kabini/Temash) but the SPI interface does. Bail out in case we
detect Yangtze and add infrastructure to distinguish other families too for
further refactorings.
Also, add ASRock IMB-A180 to the laptop whitelist and refine the IMC
warning a bit.
Tested on ASRock IMB-A180 with and w/o USE_YANGTZE_HEURISTICS, and
by Chris Goodrich from Sage on
- SB600
- SB700
- SB800
- Hudson 3 (A70M)
- Kabini
Corresponding to flashrom svn r1706.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
REed by roxfan and Michael Karcher, patch by Stefan Tauner.
Corresponding to flashrom svn r1653.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Also, unify all outputs of "Warning:" and "Error:" to use normal
capitalization instead of mixing it with all capitals.
Corresponding to flashrom svn r1643.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
IDs are from the host bridge and LPC controller. The enable function
was reverse engineered by roxfan, thanks!
User mezzo vanished without reporting any test results.
Corresponding to flashrom svn r1622.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested Mainboards:
OK:
- Foxconn P55MX
http://www.flashrom.org/pipermail/flashrom/2012-October/010002.html
Tested flash chips:
- Eon EN25F64 to PR (+PR)
http://paste.flashrom.org/view.php?id=1426
- Macronix MX25L1005 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-October/010004.html
- Set SST39VF512 to PREW (+W)
http://www.flashrom.org/pipermail/flashrom/2012-September/009958.html
Tested chipsets:
- Z77 (only reading was really tested)
Miscellaneous:
- Fix ft2232_spi's parameter parsing.
- Fix nicrealtek's init (always segfaulted since r1586 oops).
- Add another T60 variant to the laptop whitelist.
- Improve message shown when image file size does not match flash chip
- Refine messages regarding the flash descriptor override strap according
to the findings by Vladislav Bykov on his P55MX.
- Fix the ID of EN25F64.
- Demote and clarify debug message in serprog_delay().
- Minor other cleanups.
Corresponding to flashrom svn r1613.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This should get rid of the need to specify the laptop force
parameter on T60 and X60 series Thinkpads (including T60s and X60s)
that are using one of the Intel 94x northbridges and are known to have
no interfering EC. Please note that although the EC is no problem, flashrom
is not able to access the entire flash chip with the vendor BIOS, see the
coreboot wiki for details: http://www.coreboot.org/Lenovo_x60x
Corresponding to flashrom svn r1606.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
In r1577 we removed the discrimination of coreboot IDs and user-specified
mainboards. The problem is that the board enable code required to find
a board enable if either of these model strings were set. Therefore boards
running coreboot that do not need a board enable failed to execute flashrom
since then. This patch fixes this by handling coreboot IDs and user-supplied
IDs differently again.
Corresponding to flashrom svn r1605.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
It's the same as for the Neo2.
Thanks to roxfan and twice11 who did the RE!
Corresponding to flashrom svn r1597.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Jud Porter
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Based on http://patchwork.coreboot.org/patch/2881/ but with
the right pin (i.e. 16) according to Joshua Roys.
Corresponding to flashrom svn r1596.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
We made a first step into this direction in r1405, but failed to
notice that there was already an extended patch by Jonathan which
was refined to become this one.
Allows the removal of board_shuttle_fn25 (which was also intended to be
used on the ASUS A8N-SLI Deluxe, but this was never tested).
Corresponding to flashrom svn r1593.
A previous iteration was tested on CK804 and
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
which was then
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Rebasing, refining and making errors non-fatal is
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This patch just fixes a limited number of bits not conforming to c99 by using
- __asm__ instead of just asm
- {0} instead of {} for struct initialization
- h_addr_list[0] instead of h_addr to access the host address in
struct hostent
- #include <strings.h> where needed (for ffs and strcasecmp)
Based on a previous patch by Carl-Daniel.
Corresponding to flashrom svn r1585.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r1581.
Based on http://patchwork.coreboot.org/patch/2983/
Signed-off-by: Tadas Slotkus <devtadas@gmail.com>
PCI IDs are generic therefore requiring manual activation.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Helge Wagner's patch that added VIA VX900 chipset support made me look
closer at the datasheets which led to some concise documentation about
newer VIA chipsets: http://flashrom.org/VIA
Based on that this patch adds full support for VX800/VX820, VX855/VX875
and VX900, including SPI and LPC. VT8237S was not changed (SPI support
only) because there is no public datasheet and it is not clear how to
distinguish between LPC and SPI strapping and investigations in (NDAed)
documents have not brought up anything conclusively.
enable_flash_vt823x could probably be enhanced too due to various
ignored LPC options of the chipset.
Corresponding to flashrom svn r1578.
Signed-off-by: Helge Wagner <Helge.Wagner@ge.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This patch gets rid of some global variables and makes lots of bits along
the code path that control the board enable execution more generic and
clearer. From now on flashrom aborts on a few more occasions that should be
safer for the user. For example it aborts if the enable function for the
specified mainboard (enable) can not be found.
Parts of the board_match_cbname refactoring were done by Carl-Daniel.
Corresponding to flashrom svn r1577.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Abit KN8 Ultra, agami/island aruma and IWILL DK8-HTX had no secondary
PCI IDs which complicates things.
Some google foo discovered some appropriate IDs, but they are all untested.
Let's pretend this breaks nothing.
Corresponding to flashrom svn r1568.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM, but
that would not be a good choice for ID. So autodetection has been disabled
and the user needs to specify -p internal:mainboard=biostar:m7viq instead.
Corresponding to flashrom svn r1566.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Move hwaccess.h #include from flash.h to individual drivers.
libflashrom users need flash.h, but they do not care about hwaccess.h
and should not see its definitions because they may conflict with
other hardware access functions and #defines used by the libflashrom
user.
Corresponding to flashrom svn r1549.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Handle PCI Device ID 0x0360 for MCP55 ISA bridge GPIO as well.
Tested-by: Stefan A. Scholtz
Corresponding to flashrom svn r1547.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add ITE IT8707F/IT8710F detection.
Note that we autodetect those chips, but we don't handle their flash
translation features automatically yet.
Corresponding to flashrom svn r1533.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Not hooked up to the superio detection framework yet.
Corresponding to flashrom svn r1529.
Signed-off-by: David Borg <borg.db@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
These are used in ASUS RS120-E5/PA2 servers.
GPIO pin discovered, patch prepared and
Tested-by: Geoffrey McRae
Corresponding to flashrom svn r1526.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Primary IDs SMBus controller, secondary IDs MCH.
The reverse engineering was done by Michael Karcher.
Андрей Тимираев <dark_prof@mail.ru> reported the problem, but did not
reply (yet) to our propsed fix.
Corresponding to flashrom svn r1516.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
The vendor enable does some other funky stuff with MTRRs/MSRs, SMIs,
cache and legacy ISA address forward twiddling. I would only use
this patch to read and verify the existing contents, just to be safe.
The PCI IDs of the onboard devices do contain no subsystem IDs at all.
Probing and reading was
Tested-by: Ville Skyttä <ville.skytta@iki.fi>
See http://www.flashrom.org/pipermail/flashrom/2010-October/005256.html
Corresponding to flashrom svn r1501.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This patch adds a generic phase 2 board enable that does nothing but set
is_laptop to 0 to circumvent an erroneous laptop detection due to ambigous
DMI chassis information.
Corresponding to flashrom svn r1487.
Signed-off-by: Ingo Feldschmid <ifel@msc-ge.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Typical AWARD enable structure with an ICH GPIO board enable.
This board seems also to be known as D2544-B1.
Success report:
http://www.flashrom.org/pipermail/flashrom/2012-January/008590.html
Corresponding to flashrom svn r1486.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Oliver Rath <rath@mglug.de>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
NOTE:
The --list-supported-wiki output changed to use -p internal:mainboard=
instead of -m
The --list-supported output changed the heading of the mainboard list
from
Vendor Board Status Required option
to
Vendor Board Status Required value for
-p internal:mainboard=
Fix lb_vendor_dev_from_string() not to write to the supplied string.
Corresponding to flashrom svn r1483.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
The reverse engineering was done by Joshua. The actual patch was
fabricated by Paul with some polishing by Stefan.
Success log:
http://www.flashrom.org/pipermail/flashrom/2011-November/008257.html
Corresponding to flashrom svn r1468.
Signed-off-by: Joshua Roys <roysjosh at gmail.com>
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
The reverse engineering was done by Joshua. The actual patch was
fabricated by Stefan.
Request:
http://www.flashrom.org/pipermail/flashrom/2011-November/008241.html
Success report:
http://paste.flashrom.org/view.php?id=914
Corresponding to flashrom svn r1467.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Mugendai <mugendai42@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This looks suspiciously like intel_ich_gpio_set.
Based on that, add board enables for the ASUS P5N-D and P5N-E SLI.
This was tested by Guillaume Poirier-Morency on a P5N-D:
http://www.flashrom.org/pipermail/flashrom/2011-August/007706.html
Corresponding to flashrom svn r1466.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Small changes were also contributed and
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
All programmers are now calling programmer registration functions and
direct manipulations of buses_supported are not needed/possible anymore.
Note: Programmers without parallel/LPC/FWH chip support should not call
register_par_programmer().
Additional fixes:
Set max_rom_decode.parallel for drkaiser.
Remove abuse of programmer_map_flash_region in it85spi.
Annotate several FIXMEs in it85spi.
Corresponding to flashrom svn r1463.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Changes related to P5GD1 variants:
- Reorder "P5GD1 Pro" in print.c and include a DMI patter to its board enable
- Add an untested "P5GD1(-VM)" board enable and add an entry to print.c
- Add P5GD1-VM/S variant as reported by "Limer"
Changes related to P5GD(2/C) variants:
- Fix the name of "P5GDC-V Deluxe" board enable and add a DMI pattern and
print.c entry. NB: there is no "P5GDC-V" board.
- Add a generic match for P5GD(2/C)* boards with a not tested tag.
This are the potential targets for this according to the asus ftp:
ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/
Unsupported variants of the P5GD2:
P5GD2, P5GD2 Deluxe, P5GD2 Pro, P5GD2-X
(P5GD2 Premium is already tested)
(there seems to be also a P5GD2-TVM/GB/SI in the wild, which is not known to
asus :)
Unsupported variants of the P5GDC:
P5GDC Pro, P5GDC-MX
(P5GDC Deluxe and P5GDC-V Deluxe are already tested)
References:
P5GD1 PRO (dmi "P5GD1 PRO")
smbus: 0x8086, 0x266a, 0x1043, 0x80a6; audio: 0x8086, 0x2668, 0x1043, *0x814e*
http://www.coreboot.org/pipermail/flashrom/2010-August/004539.html
P5GD1 (dmi "P5GD1")
The non-pro version seems to match the pro pci pattern, but could be
distinguished by the SATA ID of 1043:2604 vs. 1043:2601:
https://launchpadlibrarian.net/62167576/Lspci.txt
or a DMI pattern of course.
P5GD1-VM (dmi "P5GD1-VM")
This does also match the current PCI IDs.
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/465379
- P5GD2 Premium (dmi "P5GD2-Premium")
smbus: 0x8086, 0x266a, 0x1043, 0x80a6; audio: 0x8086, 0x2668, 0x1043, 0x813d
http://www.flashrom.org/pipermail/flashrom/2010-August/004555.html
- P5GDC-V Deluxe (dmi "P5GDC-V")
smbus: 0x8086, 0x266a, 0x1043, 0x80a6; audio: 0x8086, 0x2668, 0x1043, 0x813d
http://www.flashrom.org/pipermail/flashrom/2010-September/004939.html
- P5GDC Deluxe (dmi "P5GDC")
smbus: 0x8086, 0x266a, 0x1043, 0x80a6; audio: 0x8086, 0x2668, 0x1043, 0x813d
http://www.flashrom.org/pipermail/flashrom/2010-September/004684.html
- P5GDC Pro, P5GDC-MX, P5GD2-X, P5GD2 Pro, P5GD2
no useful logs found
- P5GD2-Deluxe (dmi "P5GD2-Deluxe")
smbus: 0x8086, 0x266a, 0x1043, 0x80a6; audio: 0x8086, 0x2668, 0x1043, 0x813d
https://bugs.launchpad.net/ubuntu/+source/foomatic-filters/+bug/572514
- P5GD2-TVM/GB/SI (dmi "P5GD2-TVM/GB/SI")
smbus: 0x8086, 0x266a, 0x1043, 0x266a; audio: 0x8086, 0x2668, 0x1043, *0x81a7*
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/462500
Corresponding to flashrom svn r1457.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
and due to the tremendous interest... ;)
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
