Mykola Hohsadze
26852665b4
Add X86 movdir detection ( #281 )
2022-10-25 09:33:13 +02:00
Mykola Hohsdze
3485a46a6d
Add X86 GFNI detection
2022-10-24 08:29:55 +02:00
damageboy
8ca7c65f65
add x86/avx512_fp16 detection ( #279 )
...
fixes #278
2022-10-20 11:26:13 +02:00
Mykola Hohsadze
627959faee
Add AMD ZEN4 Raphael detection ( #277 )
2022-10-19 11:36:27 +02:00
Andrei Kurushin
4760834428
add mobile core flavor ( #266 )
2022-10-19 11:35:19 +02:00
Guillaume Chatelet
438a66e418
Use textual_hdrs for bazel instead of hdrs ( #276 )
2022-09-29 11:10:07 +02:00
Mykola Hohsadze
302566b160
Replace hardcoded cache type value to enum type for X86 tests ( #270 )
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Replaced hardcoded integer values of cache type to `CacheType` values for X86 tests and added declaration `CacheType` for `P4_CacheInfo` test
2022-09-19 12:56:09 +02:00
William Tambellini
b69591add3
Add support for detecting Intel CascadeLake CPUs ( #271 )
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Should close
https://github.com/google/cpu_features/issues/260
2022-09-19 10:00:01 +02:00
Mykola Hohsadze
cee2648cf0
Add cache detection for old AMD processors ( #199 )
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* Add cache detection for of old AMD processors
update links
* Add documentation link for cache_size * 512
* Update legacy amd cache detection
2022-08-18 13:55:21 +02:00
Andrei Kurushin
1e253a7728
add amd cato ( #267 )
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* add AMD RX-8125, RX-8120, and A9-9820 detection
2022-08-18 10:40:24 +02:00
Mykola Hohsadze
cd97c7cee7
Get rid repeated branch ( #269 )
...
* Get rid repeated branch
* Update cache type field comment
2022-08-18 10:39:00 +02:00
Andrei Kurushin
4e8d2e3a22
add intel goldmont plus ( #256 )
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* add intel goldmont plus (INTEL_ATOM_GMT_PLUS)
2022-08-08 09:27:18 +02:00
Andrei Kurushin
876b9e6a73
add amd piledriver 0x10 model ( #255 )
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* add amd piledriver 0x10 model
2022-08-05 15:56:53 +02:00
Andrew Kurushin
349ef06634
add CometLake model 166
2022-08-05 15:55:18 +02:00
Mykola Hohsdze
cf7cd9824f
Replace hardcode values to constants
2022-08-05 09:02:13 +02:00
Daniele Affinita
426b036e8d
Added some missing amd k12 uarch ( #259 )
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* Add comment about AMD_K12 LLANO.
* Add family 0x12 model 0x00 to it.
2022-08-04 22:30:46 +02:00
Mykola Hohsdze
c6b0a803a8
Add AVX_VNNI
2022-08-04 21:56:32 +02:00
Andrew Kurushin
cbc8f9c7a3
add Lakefield
2022-08-04 21:54:23 +02:00
Andrew Kurushin
6d62f2fa64
add intel Tremont microarch
2022-08-04 21:54:23 +02:00
Guillaume Chatelet
f60b6f8405
[NFC] Remove unused variable
2022-07-28 14:29:50 +00:00
Guillaume Chatelet
8d86a40b7a
[NFC] Restrict windows inclusion to windows platforms
2022-07-28 14:24:57 +00:00
Andrei Kurushin
d3c5e369db
test enum macro consistency ( #257 )
2022-07-28 12:34:42 +02:00
Mykola Hohsadze
601471d527
Add detection LZCNT ( #254 )
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Fixes #253
2022-07-28 12:22:16 +02:00
Andrei Kurushin
677d6419b2
remove internal FillX86BrandString usage ( #258 )
2022-07-25 17:39:50 +02:00
michael-roe
c7c7751682
Add macros for RISCV hwcaps ( #246 )
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Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
2022-07-21 21:58:04 +02:00
Andrei Kurushin
c1620a979e
add comet lake unit test #248 ( #250 )
2022-07-21 21:57:38 +02:00
Andrei Kurushin
38ae5d095c
add windows ssse3,sse4_1,sse4_2 detection for non avx path ( #251 )
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* add windows ssse3,sse4_1,sse4_2 detection for non avx path
* remove special WESTMERE case
* move windows conditional redefinition to separate header
* fix minor issues
2022-07-21 21:56:50 +02:00
Andrei Kurushin
8eb944f55d
add comet lake support #248 ( #249 )
2022-07-13 10:28:34 +02:00
Guillaume Chatelet
db9ad9fc2c
Add not about avx512_4vbmi2 being an alias of avx512_4fmaps
2022-07-12 15:45:51 +00:00
michael-roe
8360923923
Add macros for RISCV features ( #244 )
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Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
2022-07-12 11:41:15 +02:00
Mykola Hohsadze
3c4801d12d
Add AMD ZEN 4 uarch and update detection ( #243 )
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* Add AMD ZEN 4 uarch and update detection
* Add tests via cpuid dump
2022-06-17 11:18:05 +02:00
michael-roe
08f2dc115e
Added some MIPS features. ( #241 )
...
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
2022-06-01 15:58:29 +02:00
michael-roe
8b3f891d9b
Added CPU_FEATURES_COMPILED_MIPS_MIPS3D. ( #240 )
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Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
2022-05-19 11:57:13 +02:00
Mizux
0bf4ea0529
Add install doc ( Fix #238 ) ( #239 )
2022-04-27 17:08:04 +02:00
Tamas Zsoldos
b04a9daf71
Update AArch64 features to Linux 5.17. ( #237 )
2022-04-27 10:26:29 +02:00
Guillaume Chatelet
7fe96b1d3d
Comply with -Wstrict-prototypes
2022-04-14 11:01:06 +02:00
Guillaume Chatelet
dedea3a5a7
Comply with -Wstrict-prototypes
2022-04-13 13:21:32 +02:00
Guillaume Chatelet
188d0d3c38
Add bazel ci README, update main README ( #235 )
2022-03-15 17:05:03 +01:00
Guillaume Chatelet
c219c921c5
Move ci folder and make naming more consistent ( #233 )
2022-03-15 13:26:25 +01:00
Guillaume Chatelet
70ca4fd06f
Add script to generate markdown CI badges
2022-03-15 10:17:19 +00:00
Guillaume Chatelet
84974a4db5
Update CI status table
2022-03-14 23:20:03 +01:00
Mizux
49679ea9d2
ci: Add bazel jobs ( #232 )
2022-03-10 11:27:29 +01:00
Guillaume Chatelet
e4e535d7c2
Bump google test commit
2022-03-09 10:53:05 +00:00
Guillaume Chatelet
ed2c184fb2
Remove trailing whitespace in .grenrc.yml
2022-03-09 11:20:37 +01:00
Guillaume Chatelet
de700c4a30
Improve the release process ( #231 )
2022-03-09 11:05:08 +01:00
Guillaume Chatelet
8a494eb1e1
Release v0.7.0
2022-03-08 10:31:24 +00:00
Guillaume Chatelet
bdb54a2ed4
Fix release script
2022-03-08 10:30:23 +00:00
jmfriedt
40e1c7158d
replace sse3 detection with pni when reading /proc/cpuinfo ( #225 )
2022-02-22 14:19:17 +01:00
Peter Gavin
5649bdff4e
Fix include paths in BUILD ( #226 )
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Include paths should be specified through includes
rather than copts, so that they are handled correctly when
cpu_features is included in another project as an external repository.
2022-02-22 11:38:11 +01:00
AnvilaWang
1d02169588
Add support for ZHAOXIN CPU ( #218 )
2022-02-18 16:32:06 +01:00
