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10 Commits

Author SHA1 Message Date
Carl-Daniel Hailfinger
30f7cb2f3c Flashrom only checks for very few chips if the erase worked
And even when it checks if the erase worked, the result of that check is
often ignored.

Convert all erase functions and actually check return codes
almost everywhere.
Check inside all erase_* routines if erase worked, not outside.
erase_sector_jedec and erase_block_jedec have changed prototypes to
enable erase checking.

Uwe successfully tested LPC on an CK804 box and SPI on some SB600 box.

Corresponding to flashrom svn r595.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-06-15 17:23:36 +00:00
Carl-Daniel Hailfinger
38a059d6ef Every SPI host controller implemented its own way to read flash chips
This was partly due to a design problem in the abstraction layer.

There should be exactly two different functions for reading SPI chips:
- memory mapped reads
- SPI command reads.

Each of them should be contained in a separate function, optionally
taking parameters where needed.

This patch solves the problems mentioned above, shortens the code and
makes the code logic a lot more obvious.

Since open-coding the min() function leads to errors, include it in this
patch as well.

Corresponding to flashrom svn r589.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
2009-06-13 12:04:03 +00:00
Carl-Daniel Hailfinger
1dfe0ff174 Add bus type annotation to struct flashchips
Right now, the annotation only differentiates between SPI and non-SPI.
Anyone who knows more about a specific flash chip should feel free to
update it.

The existing flashbus variable was abused to denote the SPI controller
type. Use an aptly named variable for that purpose.

Once this patch is merged, the chipset/programmer init functions can set
supported flash chip types and flashrom can automatically select only
matching probe/read/erase/write functions. A side benefit of that will
be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict.

Corresponding to flashrom svn r556.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-31 17:57:34 +00:00
Carl-Daniel Hailfinger
78185dcb3c Use accessor functions for MMIO
Some MMIO accesses used volatile, others didn't (and risked
non-execution of side effects) and even with volatile, some accesses
looked dubious.

Since the MMIO accessor functions and the onboard flash accessor
functions are functionally identical (but have different signatures),
make the flash accessors wrappers for the MMIO accessors.

For some of the conversions, I used Coccinelle. Semantic patch follows:

@@ typedef uint8_t; expression a; volatile uint8_t *b; @@ - b[a] + *(b
+ a) @@ expression a; volatile uint8_t *b; @@ - *(b) |= (a); + *(b) =
*(b) | (a); @@ expression a; volatile uint8_t *b; @@ - *(b) = (a); +
mmio_writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + mmio_readb(b) @@
type T; T b; @@ ( mmio_readb | mmio_writeb ) (..., - (T) - (b) + b )

Corresponding to flashrom svn r524.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Uwe tested read, write, erase with this patch on a random board to make
sure nothing breaks.

Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-17 15:49:24 +00:00
Uwe Hermann
2cac6860c3 Drop unused/duplicated #includes and some dead code
Build-tested on 32bit x86.

Corresponding to flashrom svn r521.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-16 22:05:42 +00:00
Carl-Daniel Hailfinger
96930c3952 Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode
Change SPI architecture to handle 1-byte chunk chip writing differently
from 256-byte chunk chip writing.

Annotate SPI chip write functions with _256 or _1 suffix denoting the
number of bytes they write at maximum.

The 1-byte chunk writing is cut-n-pasted to different SPI drivers right
now. A later patch can move them to the generic spi_chip_write_1.

Corresponding to flashrom svn r485.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 02:30:21 +00:00
Carl-Daniel Hailfinger
03adbe1269 Refine handling of spi_write_enable() failures to fix chip erases on ichspi
Until the ICH SPI driver can handle preopcodes as standalone opcodes,
we should handle such special opcode failure gracefully on ICH and
compatible chipsets.

This fixes chip erase on almost all ICH+VIA SPI masters.

Thanks to Ali Nadalizadeh for helping track down this bug!

Corresponding to flashrom svn r484.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2009-05-09 02:09:45 +00:00
Uwe Hermann
97e8f22b02 Fix typo
Add missing copyright year.

Corresponding to flashrom svn r428 and coreboot v2 svn r4107.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-04-13 21:35:49 +00:00
Jason Wang
13f98cefb7 Copyright update by Jason Wang for freshly written sb600 code
Corresponding to flashrom svn r354 and coreboot v2 svn r3782.

Signed-off-by:  Jason Wang <Qingpei.wang@amd.com>
Reviewed-by:    Joe, Bao <Zheng.Bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
2008-11-29 15:07:15 +00:00
Jason Wang
a3f04be761 Add support for the AMD/ATI SB600 southbridge SPI functionality
This has been tested by Uwe Hermann on an RS690/SB600 board.

Corresponding to flashrom svn r351 and coreboot v2 svn r3779.

Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2008-11-28 21:36:51 +00:00