Fix compilation on Solaris and tell people how to compile flashrom on
Solaris, Darwin/Mac OS X and DragonFly BSD.
Thanks to Joerg Schilling and Patrick Georgi for the Solaris part.
Corresponding to flashrom svn r452.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Make that explicit in the associated prototypes. This avoids a warning
on some compilers and is a correctness issue.
Corresponding to flashrom svn r449.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
He started flashrom back in 2000.
Thanks to Ron for pointing this out.
Corresponding to flashrom svn r448.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
(all-caps or no-caps for short options, exclude range syntax, etc.) we
should tell users in the man page and the usage message about this.
Corresponding to flashrom svn r447.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Per report from Aldrik Dunbar. Thanks!
Corresponding to flashrom svn r446.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
There are still some tweaks necessary to get flashrom to build on
DragonFly, but this helps a lot.
Corresponding to flashrom svn r445.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r444.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
The old variant of using &>/dev/null works on bash and zsh, but not on
dash and tcsh. dash and tcsh interpret it as "background command and
truncate /dev/null" which is not what we want. >& works on tcsh and
bash, but it is not POSIX compliant.
Since make uses /bin/sh and /bin/sh has to be POSIX compliant, we can
use the POSIX variant of stderr and stdout redirection.
>/dev/null 2>&1
is POSIX compliant. This is specified in SuSv3, Shell Command Language,
sections 2.7.2 and 2.7.6.
Corresponding to flashrom svn r443 and coreboot v2 svn r4211.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
Corresponding to flashrom svn r441 and coreboot v2 svn r4200.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>
Also, additional small cosmetic fix.
Corresponding to flashrom svn r440 and coreboot v2 svn r4196.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
That is incorrect.
A bit of confusion comes from how the #defines are named. We call them
TEST_BAD_*, but the message printed by flashrom says: "This flash part
has status NOT WORKING for operations:"
Something that is unimplemented is definitely not working.
Neither of the chip entries mentioned above has erase or write functions
implemented, so erase and write are not working. Since their size is
unknown, we can't read them in. That means read is not working as well.
Probing is a different matter. If a chip-specific probe function had
matched, we wouldn't have to handle the chip with the "unknown xy SPI
chip" fallback. I'm tempted to call that "not working" as well, but I'm
open to discussion on this point.
Corresponding to flashrom svn r439 and coreboot v2 svn r4177.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r437 and coreboot v2 svn r4150.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r436 and coreboot v2 svn r4149.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>
This patch restores the pciid based board matching table. It makes this
table readable and hackable again, and the only disadvantage is that the
right margin is way beyond the rather dogmatic 80. All 0x0000 pci ids have
been string replaced by 0 to more easily spot missing ids, and extra
comments have been added to explain how the various entries are used.
Corresponding to flashrom svn r434 and coreboot v2 svn r4142.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r432 and coreboot v2 svn r4139.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>
It has SPI flash behind ITE8716 on LPC.
Corresponding to flashrom svn r430 and coreboot v2 svn r4132.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: illdred <illdred@gmail.com>
Corresponding to flashrom svn r429 and coreboot v2 svn r4117.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r427 and coreboot v2 svn r4092.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r426 and coreboot v2 svn r4089.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- Improve description a bit, especially wrt chip packages and
protocols.
- Add some missing parameters to manpage option descriptions.
- Remove long obsolete DoC support note.
Corresponding to flashrom svn r425 and coreboot v2 svn r4088.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested on an iWILL DK8-HTX board.
Corresponding to flashrom svn r424 and coreboot v2 svn r4086.
Signed-off-by: Mondrian nuessle <nuessle@uni-hd.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
This is a BCM5785 based machine, WP# and TLB# need to be deasserted using
GPIO 2 and 5 from the PM registers of the southbridge.
This is very similar to the x3455 implementation.
Corresponding to flashrom svn r423 and coreboot v2 svn r4031.
Signed-off-by: Mondrian Nuessle <nuessle@uni-hd.de>
Acked-by: Peter Stuge <peter@stuge.se>
Move the Atmel AT45 comments about block and page sizes from the end of
the struct to the individual struct members to improve readability.
Corresponding to flashrom svn r422 and coreboot v2 svn r4020.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
Some bootloaders seem to overwrite memory starting at 0x600, thus destroying
the coreboot table integrity, rendering the table useless.
By moving the table to the high tables area (if it's activated), this problem
is fixed.
In order to move the table, a 40 bytes mini coreboot table with a single sub
table is placed at 0x500/0x530 that points to the real coreboot table. This is
comparable to the ACPI RSDT or the MP floating table.
This patch also adds "table forward" support to flashrom and nvramtool.
Corresponding to flashrom svn r421 and coreboot v2 svn r4012.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
Before we attempt trickery, we can simply rename the accessor functions.
Patch created with the help of Coccinelle.
Corresponding to flashrom svn r420 and coreboot v2 svn r3984.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
During the conversion of flash chip accesses to helper functions, I spotted
assignments to volatile variables which were neither placed inside the mmapped
ROM area nor were they counters.
Due to the use of accessor functions, volatile usage can be reduced
significantly because the accessor functions take care of actually
performing the reads/writes correctly.
The following semantic patch spotted them (linebreak in python string
for readability reasons, please remove before usage):
@r exists@
expression b;
typedef uint8_t;
volatile uint8_t a;
position p1;
@@
a@p1 = readb(b);
@script:python@
p1 << r.p1;
a << r.a;
b << r.b;
@@
print "* file: %s line %s has assignment to unnecessarily volatile
variable: %s = readb(%s);" % (p1[0].file, p1[0].line, a, b)
Result was:
HANDLING: sst28sf040.c
* file: sst28sf040.c line 44 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 43 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 42 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 41 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 40 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 39 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 38 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 58 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 57 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 56 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 55 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 54 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 53 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
* file: sst28sf040.c line 52 has assignment to unnecessarily volatile
variable: tmp = readb(TODO: Binary);
The following semantic patch uses the spatch builtin match printing
functionality by prepending a "*" to the line with the pattern:
@@
expression b;
typedef uint8_t;
volatile uint8_t a;
@@
* a = readb(b);
Result is:
HANDLING: sst28sf040.c
diff =
- tmp = readb(bios + 0x1823);
- tmp = readb(bios + 0x1820);
- tmp = readb(bios + 0x1822);
- tmp = readb(bios + 0x0418);
- tmp = readb(bios + 0x041B);
- tmp = readb(bios + 0x0419);
- tmp = readb(bios + 0x040A);
}
static __inline__ void unprotect_28sf040(volatile uint8_t *bios)
@@ -49,13 +42,6 @@ static __inline__ void unprotect_28sf040
/* ask compiler not to optimize this */
volatile uint8_t tmp;
- tmp = readb(bios + 0x1823);
- tmp = readb(bios + 0x1820);
- tmp = readb(bios + 0x1822);
- tmp = readb(bios + 0x0418);
- tmp = readb(bios + 0x041B);
- tmp = readb(bios + 0x0419);
- tmp = readb(bios + 0x041A);
}
static __inline__ int erase_sector_28sf040(volatile uint8_t *bios,
It's arguably a bit easier to read if you get used to the leading "-"
for matching lines.
This patch was enabled by Coccinelle:
http://www.emn.fr/x-info/coccinelle/
Corresponding to flashrom svn r419 and coreboot v2 svn r3973.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Joseph Smith <joe@settoplinux.org>
Right now we perform direct pointer manipulation without any abstraction
to read from and write to memory mapped flash chips. That makes it
impossible to drive any flasher which does not mmap the whole chip.
Using helper functions readb() and writeb() allows a driver for external
flash programmers like Paraflasher to replace readb and writeb with
calls to its own chip access routines.
This patch has the additional advantage of removing lots of unnecessary
casts to volatile uint8_t * and now-superfluous parentheses which caused
poor readability.
I used the semantic patcher Coccinelle to create this patch. The
semantic patch follows:
@@
expression a;
typedef uint8_t;
volatile uint8_t *b;
@@
- *(b) = (a);
+ writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ readb(b)
@@
type T;
T b;
@@
(
readb
|
writeb
)
(...,
- (T)
- (b)
+ b
)
In contrast to a sed script, the semantic patch performs type checking
before converting anything.
Tested-by: Joe Julian
Corresponding to flashrom svn r418 and coreboot v2 svn r3971.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Report by Holger Mickler. Thanks!
Corresponding to flashrom svn r416 and coreboot v2 svn r3956.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Elan SC520 requries us to deal with flash chip base addresses at locations
other than top of 4GB. The logic for that was incorrectly triggered also when
a board had more than one flash chip. This patch will honor flashbase only when
probing for the first flash chip on the board, and look at top of 4GB for later
chips.
Corresponding to flashrom svn r415 and coreboot v2 svn r3932.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
Corresponding to flashrom svn r414 and coreboot v2 svn r3927.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: David Tiemann <davidtiemann@gmail.com>
It needs to have opcodes initialized same way as ICH7.
Corresponding to flashrom svn r413 and coreboot v2 svn r3926.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
Thanks Patrick!
Corresponding to flashrom svn r410 and coreboot v2 svn r3918.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
T/NT TEST_OK_ PROBE READ ERASE WRITE
Test report from Julia. Thanks!
Corresponding to flashrom svn r409 and coreboot v2 svn r3917.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Julia Longtin <juri@solarnetone.org>
SST AAI is Auto Address Increment writing, a streamed write to the flash chip
where the first write command sets a starting address and following commands
simply append data. Unfortunately not supported by Winbond SPI masters.
From July 2008.
Corresponding to flashrom svn r407 and coreboot v2 svn r3913.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
