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mirror of https://github.com/google/cpu_features.git synced 2025-04-27 07:02:30 +02:00

95 Commits

Author SHA1 Message Date
Christian Clauss
dcddc4a2cb Fix typos discovered by codespell 2025-02-26 13:37:34 +01:00
Guillaume Chatelet
c307dc5963 [NFC] fix formatting 2025-02-26 10:59:45 +00:00
Brad Smith
aabbd16864
Add OpenBSD Arm64 support (#367) 2024-11-08 11:14:32 +01:00
Mykola Hohsadze
d4712c8def
Update AArch64 features to Linux 6.10.6 (#359) 2024-08-27 13:12:10 +02:00
Tamas Zsoldos
104602c8ae
Update AArch64 features to Linux 6.6. (#347) 2023-11-27 09:58:26 +01:00
Mykola Hohsadze
89a3f0358a
Add FreeBSD Arm64 support (#295)
* Add FreeBSD Arm64 detection

Getting all the features is handled by reading /var/run/dmesg.boot. Feature detections were taken from the freebsd kernel code sys/arm64/arm64/identcpu.c

* Add FreeBSD Arm64 tests

* Add flagm, flagm2 and rng detection

* Add HWCAP FreeBSD AArch64

* Update include to use linux hwcaps for powerpc

* Add FreeBSD aarch64 impl

* Separate Hwacps to freebsd and linux implementation

* Add aarch64 midr_el1 implementation

* Add detection hwcap cpuid to hwcaps.h

* Add MIDR_EL1 tests
2023-09-19 11:02:25 +02:00
Mykola Hohsadze
b960bcf0f5
Add ZEN2 4800S 0880F40 (#331) 2023-09-05 14:14:53 +02:00
Mykola Hohsadze
aeaa84ecf4
Add Intel Alder Lake N detection (#330) 2023-09-05 14:14:21 +02:00
Mykola Hohsadze
248aa1b938
Add AMD ZEN4 Genoa detection (#329) 2023-09-05 14:13:54 +02:00
Mykola Hohsadze
199d299ce5
Add ZEN4 Phoenix detection (#328) 2023-09-05 14:13:27 +02:00
Tomahawkd
b5cb91b35c
Add Intel LAM/AMD UAI feature detection in X86_64 (#315)
* Add Intel LAM/AMD UAI features in X86

* Add AMD UAI test for AMD_K19_ZEN4_RAPHAEL

* Add separate UAI for AMD
2023-08-28 16:25:24 +02:00
Guillaume Chatelet
f8e3af9843
Fix bazel for aarch64 (#320)
* Remove unused function

* Fix bazel build for aarch64
2023-08-28 15:14:27 +02:00
arkivm
c5ece5e8cc
Add support for Apple M1 AArch64 SoCs (#204)
* Add support for Apple M1 AArch64 SoCs

Completely based on #150. Thanks to @sbehnke!
+ Refactoring to accomodate the new source tree
+ Adding more feature flags

* revert minimum version to 3.0

* Update introspection table

* Simplify logic for Apple HAVE_SYSCTLBYNAME

---------

Co-authored-by: Guillaume Chatelet <gchatelet@google.com>
2023-08-28 11:16:41 +02:00
Wang Xiang
0d5f398c58
Add loongarch64 Support (#314)
* Add macros for LOONGARCH hwcaps

* Update hwcaps.h

* LoongArch Support

* Remove unused definitions.

* Add ignored feature in test.
2023-08-23 20:35:29 +02:00
Tamas Zsoldos
b0913b4197
Update AArch64 features to Linux 6.4. (#310) 2023-06-09 16:47:44 +02:00
Mykola Hohsadze
0e9da93fac
Add Mendocino ZEN2 detection (#305) 2023-04-25 10:11:23 +02:00
michael-roe
75ec988188
Add RISCV vector extension (#289)
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
2023-04-24 15:36:22 +02:00
Mykola Hohsadze
5607a689e0
Add Raptor Lake-P and Raptor Lake-HX/S detection (#300) 2023-03-06 15:04:00 +01:00
Mykola Hohsadze
a6bf4f9031
Add Windows Arm64 support (#291)
* Add Windows Arm64 support

To add Windows Arm64 support was added detection of features via Windows API function IsProcessorFeaturePresent. Added _M_ARM64 to detect CPU_FEATURES_AARCH64 macro on Windows. Added initial code for Windows Arm64 testing and provided test for Raspberry PI 4. We can't use "define_introspection_and_hwcaps.inl" as a common file for all operating systems due to msvc compiler error C2099: initializer is not a constant, so as a workaround for Windows I used separate "define_introspection.inl"

See also: #268, #284, #186

* [CMake] Add  windows_utils.h to PROCESSOR_IS_AARCH64

* Add detection of armv8.1 atomic instructions

* Update note on win-arm64 implementation and move to cpuinfo_aarch64.h

* Remove redundant #ifdef CPU_FEATURES_OS_WINDOWS

* Add note on FP/SIMD and Cryptographic Extension for win-arm64

* Add comments to Aarch64Info fields

Added comments to specify that implementer, part and variant we set 0 for Windows, since Win API does not provide a way to get information. For revision added comment that we use GetNativeSystemInfo
2023-02-23 11:41:33 +01:00
Guillaume Chatelet
c919e9aa77
Support risc-v (#287)
Co-authored-by: DaniAffCH <danieleaffinita2000@gmail.com>
Co-authored-by: Corentin Le Molgat <corentinl@google.com>
2023-01-12 17:19:05 +01:00
Mykola Hohsadze
19799486d2
Add Intel Raptor Lake uarch detection (#283) 2022-11-08 15:35:50 +01:00
marquitos0119
981fbe3914
S390X Support (#274)
* support for s390x

* added z15 T01, T02 model checking

* removed z15 checking

* removed empty strings

* added s390x unit tests

* added reference url for hwcaps

* moved documentation to S390XFeatures struct, updated copyright date, removed unused include statement

* changed num_processors to int

* removed newlines from test inputs

* scripts: Add bootlin s390x support

* cmake(ci): Add s390x support

* ci: Add s390x workflow

Co-authored-by: Marcos <marcos.araque.fiallos@ibm.com>
Co-authored-by: Corentin Le Molgat <corentinl@google.com>
2022-11-02 09:38:13 +01:00
Mykola Hohsadze
bddcc3721c
Add REP instructions detection (#282) 2022-10-26 16:13:15 +02:00
Mykola Hohsadze
26852665b4
Add X86 movdir detection (#281) 2022-10-25 09:33:13 +02:00
Mykola Hohsdze
3485a46a6d Add X86 GFNI detection 2022-10-24 08:29:55 +02:00
damageboy
8ca7c65f65
add x86/avx512_fp16 detection (#279)
fixes #278
2022-10-20 11:26:13 +02:00
Mykola Hohsadze
627959faee
Add AMD ZEN4 Raphael detection (#277) 2022-10-19 11:36:27 +02:00
Andrei Kurushin
4760834428
add mobile core flavor (#266) 2022-10-19 11:35:19 +02:00
Mykola Hohsadze
302566b160
Replace hardcoded cache type value to enum type for X86 tests (#270)
Replaced hardcoded integer values of cache type to `CacheType` values for X86 tests and added declaration `CacheType` for `P4_CacheInfo` test
2022-09-19 12:56:09 +02:00
William Tambellini
b69591add3
Add support for detecting Intel CascadeLake CPUs (#271)
Should close
https://github.com/google/cpu_features/issues/260
2022-09-19 10:00:01 +02:00
Mykola Hohsadze
cee2648cf0
Add cache detection for old AMD processors (#199)
* Add cache detection for of old AMD processors




update links

* Add documentation link for cache_size * 512

* Update legacy amd cache detection
2022-08-18 13:55:21 +02:00
Andrei Kurushin
1e253a7728
add amd cato (#267)
* add AMD RX-8125, RX-8120, and A9-9820 detection
2022-08-18 10:40:24 +02:00
Andrei Kurushin
4e8d2e3a22
add intel goldmont plus (#256)
* add intel goldmont plus (INTEL_ATOM_GMT_PLUS)
2022-08-08 09:27:18 +02:00
Andrei Kurushin
876b9e6a73
add amd piledriver 0x10 model (#255)
* add amd piledriver 0x10 model
2022-08-05 15:56:53 +02:00
Andrew Kurushin
349ef06634 add CometLake model 166 2022-08-05 15:55:18 +02:00
Mykola Hohsdze
cf7cd9824f Replace hardcode values to constants 2022-08-05 09:02:13 +02:00
Mykola Hohsdze
c6b0a803a8 Add AVX_VNNI 2022-08-04 21:56:32 +02:00
Andrew Kurushin
cbc8f9c7a3 add Lakefield 2022-08-04 21:54:23 +02:00
Andrew Kurushin
6d62f2fa64 add intel Tremont microarch 2022-08-04 21:54:23 +02:00
Andrei Kurushin
d3c5e369db
test enum macro consistency (#257) 2022-07-28 12:34:42 +02:00
Mykola Hohsadze
601471d527
Add detection LZCNT (#254)
Fixes #253
2022-07-28 12:22:16 +02:00
Andrei Kurushin
677d6419b2
remove internal FillX86BrandString usage (#258) 2022-07-25 17:39:50 +02:00
Andrei Kurushin
c1620a979e
add comet lake unit test #248 (#250) 2022-07-21 21:57:38 +02:00
Andrei Kurushin
38ae5d095c
add windows ssse3,sse4_1,sse4_2 detection for non avx path (#251)
* add windows ssse3,sse4_1,sse4_2 detection for non avx path

* remove special WESTMERE case

* move windows conditional redefinition to separate header

* fix minor issues
2022-07-21 21:56:50 +02:00
Mykola Hohsadze
3c4801d12d
Add AMD ZEN 4 uarch and update detection (#243)
* Add AMD ZEN 4 uarch and update detection

* Add tests via cpuid dump
2022-06-17 11:18:05 +02:00
michael-roe
08f2dc115e
Added some MIPS features. (#241)
Co-authored-by: Michael Roe <michael-roe@users.noreply.github.com>
2022-06-01 15:58:29 +02:00
Tamas Zsoldos
b04a9daf71
Update AArch64 features to Linux 5.17. (#237) 2022-04-27 10:26:29 +02:00
jmfriedt
40e1c7158d
replace sse3 detection with pni when reading /proc/cpuinfo (#225) 2022-02-22 14:19:17 +01:00
Ryan Prichard
5f5e6d620f
Fix a getauxval comment and expand the Krait idiv workaround (#206)
* Fix getauxval comment (API 18 not 20)

getauxval is available in Android starting with API 18, not 20.

The comment about __ANDROID_API__ appears to have been copied from the
NDK's cpufeatures, which always uses dlopen/dlsym and doesn't assume it
can directly call getauxval, even if __ANDROID_API__ is new enough.
With this project, though, when __ANDROID_API__ is 18 or up, the
CMakeLists.txt file would detect that getauxval is available and define
HAVE_STRONG_GETAUXVAL.

* Broaden Qualcomm Krait idiv workaround

Some Qualcomm Krait CPUs have IDIV support but the kernel doesn't
report it. Previously, this code looked for two CPUs:
 - 0x510006F2 (0x51/'Q', variant 0, part 0x06f, rev 2)
 - 0x510006F3 (0x51/'Q', variant 0, part 0x06f, rev 3)

This check misses my 2013 Nexus 7 device, which has this CPU ID:
 - 0x511006f0 (0x51/'Q', variant 1, part 0x06f, rev 0)

My Nexus 7 device doesn't report idiv through AT_HWCAP or through
/proc/cpuinfo (AT_HWCAP is 0x1b0d7).

Expand the check to anything with:
 - implementer 0x51
 - architecture 7
 - part 0x4d or 0x6f

Part 0x4d appears to be a dual-core Krait (e.g. see
https://crbug.com/341598#c43).

This new matching behavior is a subset of what the upstream kernel
does (patch[1] contributed by CodeAurora), and also closely matches the
behavior of pytorch/cpuinfo.

[1] 120ecfafab
2022-02-01 17:25:05 +01:00
Mykola Hohsadze
f1801f0ca1
Fix list_cpu_features.exe does not detect SSE42 on Xeon X5650 (Windows) (#220) 2022-01-31 10:15:17 +01:00