1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-09-17 18:35:24 +02:00
Commit Graph

44 Commits

Author SHA1 Message Date
Antonio Vázquez Blanco
05976c7e93 pcidev.h: Extract pcidev declarations to a separate header
This patch moves all the declarations relevant to PCI into their own
header in include/pcidev.h
This is a simple refactor that aims to simplify maintenance and to
clarify file dependency inside the project.
Currently, most of the declarations reside in programmer.h making it
difficult to really understand file dependency.

Change-Id: Ie7cefa012d43e03d2d3886f1567ad9b3fe1b148c
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/89094
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-09-17 12:29:32 +00:00
Antonio Vázquez Blanco
51a7275a31 udelay: move into platform folder
Change-Id: I9910cd1f5850a6f86e26bb1dc4ff26614f0a0964
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/88270
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-07-03 05:45:38 +00:00
Antonio Vázquez Blanco
ce825859c4 Move SPI declarations from flash.h to spi.h
As a consecuence, some of the files that used to include flash.h no
longer need to do so. For this reason, flash.h includes are also deleted
in this commit.

Change-Id: I794a71536a3b85fde39f83c802fa0f5dd8d428e0
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/85539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: David Reguera Garcia (Dreg) <regueragarciadavid@gmail.com>
Reviewed-by: Matti Finder <matti.finder@gmail.com>
2025-02-21 07:17:57 +00:00
Thomas Heijligen
90286fe643 printf: Use inttype.h macros for format strings
DJGPP for compiling DOS has other sizes for the normal int types and
therefore throwing errors when using %i %d or %x with uint32_t.

Fix these warnings by using the macros created for it and provided in
inttypes.h.

Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73040
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-27 09:36:46 +00:00
Edward O'Callaghan
21901c11e7 tree/: Case write_granularity enum values
Change-Id: Ic8c655225abe477c1b618dc685b743e691c16ebd
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/74165
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-06 05:15:03 +00:00
Edward O'Callaghan
76f28a3fc2 tree/: Rename 'internal_delay()' to 'default_delay()'
The non-custom driver programmer delay implementation
'internal_delay()' is unrelated specifically to the
'internal' programmer. The delay implementation is
simply a platform-agnostic host delay implementation.
Therefore, rename to simply default_delay().

Change-Id: I5e04adf16812ceb1480992c92bca25ed80f8897a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68855
Reviewed-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-12 23:00:58 +00:00
Edward O'Callaghan
1e01eefcba tree/: Replace NULL-case of programmer_delay() with internal_delay
Replace `programmer_delay(NULL, [..])` calls with direct
`internal_delay([..])` dispatches explicitly. Custom driver
delays remain hooked as well as core flashrom logic. The
NULL base case of 'programmer_delay()' then becomes a condition
to validate for layering violations or invalid flash contexts.

Change-Id: I1da230804d5e8f47a6e281feb66f381514dc6861
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68434
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-12 00:02:26 +00:00
Anastasia Klimchuk
f206183eb4 opaque_master: Mark Opaque chip as tested for WP
Opaque masters, by design, populate the flashchip structure during
the execution of their probe function. Therefore any opaque master
operation displays a message to the user:
"This flash part has status UNTESTED for operations: WP".

However, for all the other operations (read, write, erase) opaque
masters always mark them as tested. Thus, align WP as marked tested
inline with other opaque chip operations.

BUG=b:258755442
TEST=the following does not display untested message:
1) flashrom -p dummy:size=8388608,emulate=VARIABLE_SIZE
2) flashrom -p internal (on Intel device)

Change-Id: I5ae4cb49eb0abc6ab26cfe2f3359e4e50dd4fd4f
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/69842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-11-25 03:24:59 +00:00
Felix Singer
618bdb37e1 nicintel_eeprom.c: Fix typo
`done_i20_write` is meant to be `done_i210_write`. Fix that.

Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Idc0a0c475e891fc8538a7a81093520e01e1b25bf
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Alexander Goncharov <chat@joursoir.net>
2022-10-31 05:19:29 +00:00
Alexander Goncharov
5c69cde561 tree: provide flashrom context into programmer_delay()
Modify the `programmer_delay` function signature to allow passing
the flashrom context. Programmers that depend on internal delay
should provide NULL as a context. The use of this function parameter
will be introduced in CB:67393.

TOPIC=programmer_handle_global
TEST=builds

Change-Id: Ibb0bce26ce2052853ee52158d7ba742967a9e229
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-10-17 01:00:35 +00:00
Edward O'Callaghan
67d5015617 drivers/: Make 'fallback_{un}map' the default unless defined
Drop the explicit need to specify the default 'fallback_{un}map'
callback function pointer from the 'programmer_entry' struct.
This is a reasonable default for every other driver in the tree
with only a select few exceptions [atavia, serprog, dummyflasher
and internal].

Thus this simplifies driver development and paves way
to remove the 'programmer' global handle.

Change-Id: I5ea7bd68f7ae2cd4af9902ef07255ab6ce0bfdb3
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67404
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-08 18:36:21 +00:00
Edward O'Callaghan
4b503bee39 drivers/: Make 'internal_delay' the default unless defined
Drop the explicit need to specify the default 'internal_delay'
callback function pointer in the programmer_entry struct.
This is a reasonable default for every other driver in the
tree with only the two exceptions of ch341a_spi.c and serprog.c.

Thus this simplifies driver development.

Change-Id: I17460bc2c0aebcbb48c8dfa052b260991525cc49
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67391
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-27 04:30:43 +00:00
Edward O'Callaghan
5d63d3f884 tree: Fix drivers to pass programmer_cfg to pcidev_init()
Allow for programmer_cfg plumbing in pcidev.c
The pci drivers impacted are plumbed here as well.

Change-Id: Ie0c9d1c0866d44f64d037c596f2e30547fcfd58f
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-09-07 02:45:15 +00:00
Edward O'Callaghan
1233e63833 tree: Allow passing programmer_cfg directly to programmer
Modify the type signature of each programmer entry-point
xxx_init() functions to allow for the consumption of the
programmer parameterisation string data.

```
 $ find -name '*.c' -exec sed -i 's/_init(void)/_init(const char *prog_param)/g' '{}' \;
 $ find -name '*.c' -exec sed -i 's/get_params(/get_params(const char *prog_param, /g' '{}' \;
 $ find -name '*.c' -exec sed -i 's/const char \*prog_param)/const struct programmer_cfg *cfg)/g' '{}' \;
 $ find -name '*.c' -exec sed -i 's/const char \*prog_param,/const struct programmer_cfg *cfg,/g' '{}' \;
```
and manually fix up any remaining parts.

Change-Id: I8bab51a635b9d3a43e1619a7a32b334f4ce2cdd2
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-09-07 01:50:58 +00:00
Alexander Goncharov
c9db744f78 nicintel_eeprom: pack eebar into programmer's data
Move global variable into a struct and store within the opaque_master
data field for the life-time of the driver.

This is one of the steps on the way to move opaque_master data
memory management behind the initialisation API.

TOPIC=register_master_api
TEST=builds

Change-Id: Ia53416b2c5c5b6a737b13cf93ce39870f048473d
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66693
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-30 10:20:09 +00:00
Alexander Goncharov
cf9f84796f nicintel_eeprom: decouple function signatures from global state
Pass eebar as a parameter to helper functions.

This is one of the steps on the way to move opaque_master data
memory management behind the initialisation API.

TOPIC=register_master_api
TEST=builds

Change-Id: I6873f0e63c58bb6f8960dba6adbd59c6ef1d776f
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66692
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-30 10:19:47 +00:00
Alexander Goncharov
9307e68d68 nicintel_eeprom: pack pci device struct into programmer's data
Move global variable into a struct and store within the opaque_master
data field for the life-time of the driver.

This is one of the steps on the way to move opaque_master data
memory management behind the initialisation API.

TOPIC=register_master_api
TEST=builds

Change-Id: I69271bc77a6d7211e692c0b48d1853b95ffa80e9
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66691
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-30 10:16:19 +00:00
Alexander Goncharov
7ebb18985d nicintel_eeprom: unify the code path of opaque master registration
TOPIC=register_master_api
TEST=builds

Change-Id: I9f5f181fe4497ac95e89df8588522a40ba8be024
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66158
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-30 10:15:29 +00:00
Alexander Goncharov
3234e04743 nicintel_eeprom: refactor i210 variable into reentrant pattern
Move global Intel I210 specific variable into a struct and store
within the opaque_master data filed for the life-time of the driver.

This is one of the steps on the way to move opaque_master data
memory management behind the initialisation API.

TOPIC=register_master_api
TEST=builds

Change-Id: Ifda0d8666399ea165bac6378c57720b5560806f1
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66690
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-08-30 10:13:47 +00:00
Alexander Goncharov
95b6cf1835 nicintel_eeprom: turn 82580 state variable into a struct
Intel 82580 has more than just the "eec" variable. Others will be
added to the structure in the next commits.

TOPIC=register_master_api
TEST=builds

Change-Id: I66d42c6648088da7097674314dd00f34ef97119c
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66689
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-08-30 10:13:18 +00:00
Alexander Goncharov
0b654bb92e nicintel_eeprom: handle errors using goto for i210's shutdown
This patch prepares the programmer to move global singleton states
into a struct.

TOPIC=register_master_api
TEST=builds

Change-Id: Idb4f75fa92966a0fffd83dd0e297f5f51f6c0bd3
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/391
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-08-30 10:12:35 +00:00
Thomas Heijligen
b554cdc91e tree: indent struct *_master consistently with tabs
Use `<tab>.key<tab>*= <value>,`

TEST: `make VERSION=0 MAN_DATE=0` returns the same flashrom binary
before and after the patch

Change-Id: I1c45ea9804ca09e040d7ac98255042f58b01f8ef
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65363
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-27 08:56:00 +00:00
Edward O'Callaghan
cba5de5e24 tree: Consolidate BIT() macro
Change-Id: I7e61f7671b70ca5ed751d99405714436bcd18d5a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64962
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-06-10 01:07:19 +00:00
Thomas Heijligen
64b9e3f59e hwaccess: move mmio functions into hwaccess_physmap
The mmio_le/be_read/writex functions are used for raw memory access.
Bundle them with the physmap functions.

Change-Id: I313062b078e89630c703038866ac93c651f0f49a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-01-20 16:51:01 +00:00
Thomas Heijligen
0c3bdd9fc6 nicintel_eeprom: remove unused rget_io_perms()
The nicintel_eeprom programmer does not use x86 IO Ports. Remove the
dependency to it.

Change-Id: I5fd42572fd29f5d7fd749c2836eac3e68c947946
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60845
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-10 12:17:32 +00:00
Thomas Heijligen
b8f364bece physmap: rename to hwaccess_physmap, create own header
Line up physmap with the other hwaccess related code.

Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-12-22 22:53:47 +00:00
Thomas Heijligen
49d758698a hwaccess: move x86 port I/O related code into own files
Allow port I/O related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.

Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-12-22 12:35:00 +00:00
Thomas Heijligen
88c871e74c pci.h: move include into own wrapper
Split the include of hwaccess and libpci. There is no need to have pci.h
included in hwaccess.

Change-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-12-22 12:33:15 +00:00
Anastasia Klimchuk
9db8e12c16 opaque_master: Use new API to register shutdown function
This allows opaque masters to register shutdown function in
opaque_master struct, which means there is no need to call
register_shutdown in init function, since this call is now a part
of register_opaque_master.

As a consequence of using new API, two things are happening here:
1) No resource leakage anymore in case register_shutdown() would fail,
2) Fixed propagation of register_opaque_master() return values.

BUG=b:185191942
TEST=1) builds and ninja test including CB:56413
2) on ARMv7 device
flashrom -p linux_mtd -V
-> using linux_mtd, chip found

Change-Id: Id8471a117556edcbf9694752fabe05cf4501ce70
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-08-25 02:23:34 +00:00
Anastasia Klimchuk
b261bec1ee opaque_master: Move shutdown function above opaque_master struct
This patch prepares opaque masters to use new API which allows to
register shutdown function in opaque_master struct. See also later
patch in this chain, where opaque masters are converted to new API.

BUG=b:185191942
TEST=builds and ninja test
Comparing flashrom binary before and after the patch,
make clean && make CONFIG_EVERYTHING=yes VERSION=none
binary is the same

Change-Id: I5000cfceeba859a76177a17c1cb7d1c1e9fc03fe
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-08-17 16:31:10 +00:00
Anastasia Klimchuk
e44e6eb32f nicintel_eeprom: Check UNPROG_DEVICE in 82580 shutdown
Previously shutdown function was registered conditionally for 82580,
only if the device was not UNPROG_DEVICE. This patch moves the check
for UNPROG_DEVICE into shutdown function itself, so that shutdown
function can be always registered for 82580.

This also fixes a memory leak in nicintel_ee_shutdown_82580.

No changes for i210 device init/shutdown, only for 82580.

And very importantly this unlocks API change which plans to move
register_shutdown inside register_opaque_master, similar to what's
done in CB:56103

BUG=b:185191942
TEST=builds

Change-Id: I5c729a3a63d0106e65525a6a77b2f9104c96847f
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56821
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-08-17 16:29:23 +00:00
Anastasia Klimchuk
099be52132 nicintel_eeprom: Delete extra parentheses from if condition
BUG=185191942
TEST=builds

Change-Id: I068bd227668a79f14e38e703a5a49db18d5de8c7
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-08-17 16:28:31 +00:00
Thomas Heijligen
4f5169df5f programmer_table: move each entry to the associated programmer source
Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-06-10 12:49:16 +00:00
Anastasia Klimchuk
9309bed290 programmer: Smoothen register_opaque_master() API
It was impossible to register a const struct opaque_master that would
point to dynamically allocated `data`. Fix that so that we won't
have to create more mutable globals.

BUG=b:185191942
TEST=builds

Change-Id: Id3adb4cf04ae04dbe87ddb96f30871cb5f7c8ff0
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54170
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-23 04:18:54 +00:00
Angel Pons
c117378478 nicintel_eeprom.c: Mark 8086:1531 as tested
Reading, erasing and writing works on an i210 NIC of an Asus Z10PA-D8.

Change-Id: I9cabea5dfb9424b9c30d82840089506f2bd943da
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-05-13 10:00:53 +00:00
Nico Huber
89622674b2 nicintel_eeprom: Reduce usage of is_i210()
Don't entagle the code paths for the two NIC classes if it's not necessary.

Only compile tested.

Change-Id: I59164ccf54afbbd64a0598282d13e80ff7fd6fa4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33637
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-12-10 16:38:50 +00:00
Elyes HAOUAS
e083880279 Remove address from GPLv2 headers
Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-04-24 20:21:41 +00:00
Nico Huber
4343e7d440 fixup! nicintel_eeprom: Support for I210 emulated EEprom
Fix is_i210(), add a comment and break an overlong line.

Change-Id: I5d3f71e4e0f77cc8793e7f395baf69e1fad930a3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/21934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2017-10-20 19:27:08 +00:00
David Hendricks
79d838d316 fixup! nicintel_eeprom: Support for I210 emulated EEprom
A couple of C99-style variable declarations within loops are causing
compilation failures on some systems (gcc 4.9.2-10 on Raspbian). This
moves them to make gcc happy.

Change-Id: Ib7ad5a69244e462f84eae93df9e841716e089b31
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/21702
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-10-03 00:23:34 +00:00
Ricardo Ribalda Delgado
9fe1fb71c7 nicintel_eeprom: Support for I210 emulated EEprom
On the I210 family there is no MAC EEprom, instead there is a big flash
(typically around 16Mb) with contents of the old MAC plus other stuff.
There is an interface to program the whole flash, but once it is
programmed it enters a "Secure Mode" that disables the interface.

Luckily, the section with the MAC can still be updated via the EEprom
interface. This patch adds support for this interface.

root@qt5022-fglrx:~# ./flashrom -p nicintel_eeprom:pci=01:0.0 -w kk.raw -V
flashrom v0.9.9-unknown on Linux 4.10.0-qtec-standard (x86_64)
flashrom is free software, get the source code at https://flashrom.org

flashrom was built with libpci 3.4.1, GCC 5.3.0, little endian
Command line (5 args): ./flashrom -p nicintel_eeprom:pci=01:0.0 -w kk.raw -V
Calibrating delay loop... OS timer resolution is 1 usecs, 1856M loops per second, 10 myus = 10 us,
100 myus = 102 us, 1000 myus = 1017 us, 10000 myus = 10044 us, 4 myus = 4 us, OK.
Initializing nicintel_eeprom programmer
Found "Intel I210 Gigabit Network Connection" (8086:1533, BDF 01:00.0).
Requested BAR is of type MEM, 32bit, not prefetchable
Requested BAR is of type MEM, 32bit, not prefetchable
The following protocols are supported: Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Found Programmer flash chip "Opaque flash chip"
(4 kB, Programmer-specific) on nicintel_eeprom.
Found Programmer flash chip "Opaque flash chip" (4 kB, Programmer-specific).
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W
Erase/write done.
Verifying flash... VERIFIED.

Change-Id: I553f33e5dcb4412d682fc93095b29bcfed11713c
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-on: https://review.coreboot.org/21431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2017-09-17 18:05:16 +00:00
Stefan Tauner
5c316f9549 Add a bunch of new/tested stuff and various small changes 22
Tested mainboards:
OK:
 - AOpen UK79G-1394 (used in EZ18 barebones)
   Reported by Lawrence Gough
 - ASUS M4N78 SE
   Reported by Dima Veselov
 - ASUS P5LD2-VM
   Mark board enable as tested (reported by Dima Veselov)
 - GIGABYTE GA-970A-UD3P (rev. 2.0)
   Reported by trucmar on IRC
 - GIGABYTE GA-990FXA-UD3 (rev. 4.0)
   Reported by ROKO__ on IRC
 - GIGABYTE GA-H77-DS3H (rev. 1.1)
   Reported by Evgeniy Edigarev
 - GIGABYTE GA-P55-USB3 (rev. 2.0)
   Reported by Måns Thörnqvist
 - MSI MS-7817 (H81M-E33)
   Reported by Igor Kolker

Chipsets:
 - Marked Intel Bay Trail (0x0f1c) as tested OK
   Reported by Antonio Ospite
 - Refine Intel IDs
    * Add IDs for Braswell
    * Add IDs for 9 Series PCHs (e.g. H97, Z97)
    * Rename Wellsburg devices slightly

Flash chips:
 - Atmel AT25DF041A to PREW (+PREW)
   Reported by Tai-hwa Liang
 - Atmel AT26DF161 to PREW (+EW)
   Reported by Steve Shenton
 - Atmel AT45DB011D to PREW (+PREW)
   Reported by The Raven
 - Atmel AT45DB642D to PREW (+PREW)
   Reported by Mahesh Mokal
 - Eon EN25F32 to PREW (+PREW)
   Reported by Arman Khodabande
 - Eon EN25F40 to PREW (+REW)
   Reported by Jerrad Pierce
 - Eon EN25QH16 to PREW (+EW)
   Reported by Ben Johnson
 - GigaDevice GD25Q20(B) to PREW (+PREW)
   Reported by Gilles Aurejac
 - Macronix MX25U6435E/F to PR (+PR)
   Reported by Matt Taggart
 - PMC Pm25LV512(A) to PREW (+PREW)
   Reported by The Raven
 - SST SST39VF020 to PREW (+PREW)
   Reported by Urja Rannikko
 - Winbond W25Q40.V to PREW (+EW)
   Reported by Torben Nielsen
 - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E).
 - Add MX25L6465E variant.
 - There was never a MX25L12805 AFAICT.
 - Split MX25L12805 from models with the same ID but an additional 32 kB
   eraser: MX25L12835F/MX25L12845E/MX25L12865E.
 - Add a bunch of ST parallel NOR flash chip IDs.

Miscellaneous:
 - Whitelist ThinkPad X200.
 - Constify master parameter of register_master().
 - Remove FEATURE_BYTEWRITES because it was never used at all.
 - Refine hwseq messages and make them less prominent.
 - Fix the yet unused PRIxCHIPADDR format string thingy.
 - Fix copy&paste error in spi_prettyprint_status_register_bp().
   Spotted by Pablo Cases.
 - Add an additional SMBus controller revision to identify another Yangtze
   model. Thanks to Dan Christensen for reporting this issue.
 - dediprog: add missing include for stdlib.h.
   This fixes (at least) building on FreeBSD and DragonflyBSD with gcc.
 - Remove references to struct pci_filter from programmer.h.
   It is only needed in internal.c where it has a complete type. Having
   it in programmer.h provokes a warning by some old versions of gcc.
 - Tiny other stuff.

Corresponding to flashrom svn r1879.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
2015-02-08 21:57:52 +00:00
Stefan Tauner
3e6b7bb948 Shadowing fix in nicintel_eeprom.c for ancient libpci
Very old versions (<2.2) of pciutils had a typedef named "word" in
types.h. That does not play well with previous local variable names
of nicintel_eeprom.c.

Corresponding to flashrom svn r1874.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
2015-01-25 23:45:14 +00:00
Stefan Tauner
8d21ff1d63 Refinements for DragonflyBSD
- /usr/include/cpu/param.h defines PAGE_MASK already, hence use another
   name for the respective macro in nicintel_eeprom.c.
 - Since DragonflyBSD 3.6 DPorts is used as the default package manager.
   Therefore we should use /usr/local/ instead of /usr/pkg/ on default
   to fetch libraries.

Corresponding to flashrom svn r1866.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
2015-01-10 09:33:06 +00:00
Ricardo Ribalda Delgado
2a41f0a2c0 Add new programmer for SPI EEPROMs attached to Intel 82580 NICs
This patch lets you read and write the EEPROM on 82580-based gigabit NIC
cards. So far it has been tested on copper NICs only, but other variants
employing this controller should work too.
It is a nice substitution for the official eeupdate tool.

Speed is quite decent: less than 4 seconds for erases or writes of 32 kB.

Corresponding to flashrom svn r1832.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
2014-07-28 20:35:21 +00:00